linux-kernel - [PATCH v3 3/8] dt-bindings: riscv: cpus: Add SiFive X280 compatible

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Message-Id: <20251013-tt-bh-dts-v3-3-9f058d4bbbda@oss.tenstorrent.com>
Date: Mon, 13 Oct 2025 20:11:55 -0700
From: Drew Fustini <fustini@...nel.org>
To: Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Alexandre Ghiti <alex@...ti.fr>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Samuel Holland <samuel.holland@...ive.com>, 
 Daniel Lezcano <daniel.lezcano@...aro.org>, 
 Thomas Gleixner <tglx@...utronix.de>, Anup Patel <anup@...infault.org>, 
 Arnd Bergmann <arnd@...db.de>, Joel Stanley <joel@....id.au>, 
 Joel Stanley <jms@....tenstorrent.com>, 
 Nicholas Piggin <npiggin@....tenstorrent.com>, 
 Michael Neuling <mikey@...ling.org>, Michael Ellerman <mpe@...nel.org>, 
 Andy Gross <agross@...nel.org>, 
 Anirudh Srinivasan <asrinivasan@....tenstorrent.com>, 
 Drew Fustini <dfustini@....tenstorrent.com>, Paul Walmsley <pjw@...nel.org>, 
 Albert Ou <aou@...s.berkeley.edu>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-riscv@...ts.infradead.org, Conor Dooley <conor@...nel.org>
Subject: [PATCH v3 3/8] dt-bindings: riscv: cpus: Add SiFive X280
 compatible

From: Drew Fustini <dfustini@....tenstorrent.com>

Document compatible for the SiFive X280 RISC-V core.

Acked-by: Rob Herring (Arm) <robh@...nel.org>
Reviewed-by: Joel Stanley <jms@....tenstorrent.com>
Signed-off-by: Drew Fustini <dfustini@....tenstorrent.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 153d0dac57fb39d39219e138792f4cb831cb88dc..afb8533f6a081bd9b91e13e30185f99ec2d5dc3b 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -70,6 +70,7 @@ properties:
           - enum:
               - sifive,e51
               - sifive,u54-mc
+              - sifive,x280
           - const: sifive,rocket0
           - const: riscv
       - const: riscv    # Simulator only

-- 
2.34.1