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Message-ID: <534001b9c846e8d3164008fb92fb6f845b54fb4b.camel@mediatek.com>
Date: Tue, 14 Oct 2025 07:20:11 +0000
From: Zhengnan Chen (陈征南)
<Zhengnan.Chen@...iatek.com>
To: "robin.murphy@....com" <robin.murphy@....com>, "joro@...tes.org"
<joro@...tes.org>, Yong Wu (吴勇)
<Yong.Wu@...iatek.com>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
"robh@...nel.org" <robh@...nel.org>, "matthias.bgg@...il.com"
<matthias.bgg@...il.com>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
"will@...nel.org" <will@...nel.org>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>, "devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>, Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>, "iommu@...ts.linux.dev"
<iommu@...ts.linux.dev>
Subject: Re: [PATCH 3/3] iommu/mediatek: Add support for mt8189
On Sun, 2025-08-10 at 07:09 +0000, Yong Wu (吴勇) wrote:
> On Thu, 2025-08-07 at 17:57 +0800, zhengnan chen wrote:
> > From: "zhengnan chen" <zhengnan.chen@...iatek.com>
> >
> > Add support for mt8189 INFRA & APU & MM IOMMUs.
> >
> > Signed-off-by: zhengnan chen <zhengnan.chen@...iatek.com>
>
> Splitting this into three patches(apu/mm/infra) may make the patch
> more
> readable.
>
ok, i will split the patch in the next version.
> > ---
> > drivers/iommu/mtk_iommu.c | 76
> > +++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 76 insertions(+)
> >
>
> [snip]
>
> > +
> > +static const struct mtk_iommu_plat_data mt8189_data_mm = {
> > + .m4u_plat = M4U_MT8189,
> > + .flags = HAS_BCLK | HAS_SUB_COMM_3BITS |
> > OUT_ORDER_WR_EN |
> > + WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM
> > >
> >
> > + PGTABLE_PA_35_EN | DL_WITH_MULTI_LARB,
> > + .hw_list = &m4ulist,
> > + .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
> > + .banks_num = 5,
> > + .banks_enable = {true, false, false, false, true},
> > + .iova_region = mt8192_multi_dom,
> > + .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
> > + .iova_region_larb_msk = mt8189_larb_region_msk,
> > + .larbid_remap = {{0}, {1}, {21/*GCE_D*/, 21/*GCE_M*/, 2},
>
> Take care the format, Add space after '/*'
ok, i will adjust the format in the next version.
>
> > + {19, 20, 9, 11}, {7}, {4},
> > + {13, 17}, {14, 16}},
> > +};
> > +
> > static const struct mtk_iommu_plat_data mt8192_data = {
> > .m4u_plat = M4U_MT8192,
> > .flags = HAS_BCLK | HAS_SUB_COMM_2BITS |
> > OUT_ORDER_WR_EN |
> > @@ -1826,6 +1899,9 @@ static const struct of_device_id
> > mtk_iommu_of_ids[] = {
> > { .compatible = "mediatek,mt8188-iommu-infra", .data =
> > &mt8188_data_infra},
> > { .compatible = "mediatek,mt8188-iommu-vdo", .data =
> > &mt8188_data_vdo},
> > { .compatible = "mediatek,mt8188-iommu-vpp", .data =
> > &mt8188_data_vpp},
> > + { .compatible = "mediatek,mt8189-iommu-apu", .data =
> > &mt8189_data_apu},
> > + { .compatible = "mediatek,mt8189-iommu-infra", .data =
> > &mt8189_data_infra},
> > + { .compatible = "mediatek,mt8189-iommu-mm", .data =
> > &mt8189_data_mm},
> > { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
> > { .compatible = "mediatek,mt8195-iommu-infra", .data =
> > &mt8195_data_infra},
> > { .compatible = "mediatek,mt8195-iommu-vdo", .data =
> > &mt8195_data_vdo},
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