linux-kernel - Re: [PATCH] x86/cpufeatures: Correct LKGS feature flag description

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Message-ID: <2dd4dbee-dc7d-4118-be6d-94bd6d0d5030@zytor.com>
Date: Wed, 15 Oct 2025 23:08:17 +0800
From: Xin Li <xin@...or.com>
To: Borislav Petkov <bp@...nel.org>, "H. Peter Anvin" <hpa@...or.com>,
        Xin Li <xin3.li@...el.com>
Cc: X86 ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>,
        "Borislav Petkov (AMD)" <bp@...en8.de>
Subject: Re: [PATCH] x86/cpufeatures: Correct LKGS feature flag description

On 10/15/2025 6:35 PM, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@...en8.de>
> 
> Quotation marks in cpufeatures.h comments are special and when the
> comment begins with a quoted string, that string lands in /proc/cpuinfo,
> turning it into a user-visible one.
> 
> The LKGS comment doesn't begin with a quoted string but just in case
> drop the quoted "kernel" in there to avoid confusion. And while at it,
> simply change the description into what the LKGS instruction does for
> more clarity.
> 
> No functional changes.
> 
> Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
> ---
>   arch/x86/include/asm/cpufeatures.h       | 2 +-
>   tools/arch/x86/include/asm/cpufeatures.h | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 80b68f4726e7..4fb5e12dbdbf 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -320,7 +320,7 @@
>   #define X86_FEATURE_FSRS		(12*32+11) /* Fast short REP STOSB */
>   #define X86_FEATURE_FSRC		(12*32+12) /* Fast short REP {CMPSB,SCASB} */
>   #define X86_FEATURE_FRED		(12*32+17) /* "fred" Flexible Return and Event Delivery */
> -#define X86_FEATURE_LKGS		(12*32+18) /* Load "kernel" (userspace) GS */
> +#define X86_FEATURE_LKGS		(12*32+18) /* MSR_KERNEL_GS_BASE = GS.base */

Yes, the assignment is more clearer to us programmers.

I'm just not sure if "correct" in the shortlog is accurate; it sounds the
existing one is wrong.  Otherwise,

Reviewed-by: Xin Li (Intel) <xin@...or.com>






>   #define X86_FEATURE_WRMSRNS		(12*32+19) /* Non-serializing WRMSR */
>   #define X86_FEATURE_AMX_FP16		(12*32+21) /* AMX fp16 Support */
>   #define X86_FEATURE_AVX_IFMA            (12*32+23) /* Support for VPMADD52[H,L]UQ */
> diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h
> index bd655e100395..d5f091babf96 100644
> --- a/tools/arch/x86/include/asm/cpufeatures.h
> +++ b/tools/arch/x86/include/asm/cpufeatures.h
> @@ -320,7 +320,7 @@
>   #define X86_FEATURE_FSRS		(12*32+11) /* Fast short REP STOSB */
>   #define X86_FEATURE_FSRC		(12*32+12) /* Fast short REP {CMPSB,SCASB} */
>   #define X86_FEATURE_FRED		(12*32+17) /* "fred" Flexible Return and Event Delivery */
> -#define X86_FEATURE_LKGS		(12*32+18) /* Load "kernel" (userspace) GS */
> +#define X86_FEATURE_LKGS		(12*32+18) /* MSR_KERNEL_GS_BASE = GS.base */
>   #define X86_FEATURE_WRMSRNS		(12*32+19) /* Non-serializing WRMSR */
>   #define X86_FEATURE_AMX_FP16		(12*32+21) /* AMX fp16 Support */
>   #define X86_FEATURE_AVX_IFMA            (12*32+23) /* Support for VPMADD52[H,L]UQ */