linux-kernel - Re: [PATCH 04/19] sched/fair: Introduce a static key to enable cache aware only for multi LLCs

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Message-ID: <3d7b6b2c-7b48-4bd5-87bf-39f4c72fa741@intel.com>
Date: Thu, 16 Oct 2025 01:01:05 +0800
From: "Chen, Yu C" <yu.c.chen@...el.com>
To: Shrikanth Hegde <sshegde@...ux.ibm.com>
CC: Ingo Molnar <mingo@...hat.com>, K Prateek Nayak <kprateek.nayak@....com>,
	"Gautham R . Shenoy" <gautham.shenoy@....com>, Vincent Guittot
	<vincent.guittot@...aro.org>, Juri Lelli <juri.lelli@...hat.com>, "Dietmar
 Eggemann" <dietmar.eggemann@....com>, Steven Rostedt <rostedt@...dmis.org>,
	Ben Segall <bsegall@...gle.com>, Mel Gorman <mgorman@...e.de>, "Valentin
 Schneider" <vschneid@...hat.com>, Madadi Vineeth Reddy
	<vineethr@...ux.ibm.com>, Hillf Danton <hdanton@...a.com>, Jianyong Wu
	<jianyong.wu@...look.com>, Yangyu Chen <cyy@...self.name>, Tingyin Duan
	<tingyin.duan@...il.com>, Vern Hao <vernhao@...cent.com>, Len Brown
	<len.brown@...el.com>, Aubrey Li <aubrey.li@...el.com>, Zhao Liu
	<zhao1.liu@...el.com>, Chen Yu <yu.chen.surf@...il.com>, Adam Li
	<adamli@...amperecomputing.com>, Tim Chen <tim.c.chen@...el.com>,
	<linux-kernel@...r.kernel.org>, Peter Zijlstra <peterz@...radead.org>, "Tim
 Chen" <tim.c.chen@...ux.intel.com>
Subject: Re: [PATCH 04/19] sched/fair: Introduce a static key to enable cache
 aware only for multi LLCs

On 10/16/2025 12:36 AM, Shrikanth Hegde wrote:
> 
> 
> On 10/15/25 9:55 PM, Chen, Yu C wrote:
>> On 10/15/2025 7:04 PM, Peter Zijlstra wrote:
>>> On Sat, Oct 11, 2025 at 11:24:41AM -0700, Tim Chen wrote:
>>>> From: Chen Yu <yu.c.chen@...el.com>
>>>>
>>>> Enable cache-aware load balancing only if at least 1 NUMA node has
>>>> more than one LLC.
>>>>
>>>> Suggested-by: Libo Chen <libo.chen@...cle.com>
>>>> Suggested-by: Adam Li <adamli@...amperecomputing.com>
>>>> Signed-off-by: Chen Yu <yu.c.chen@...el.com>
>>>> Signed-off-by: Tim Chen <tim.c.chen@...ux.intel.com>
>>>> ---
>>>>   kernel/sched/fair.c     | 15 ++++++++++++---
>>>>   kernel/sched/sched.h    |  1 +
>>>>   kernel/sched/topology.c | 14 ++++++++++++--
>>>>   3 files changed, 25 insertions(+), 5 deletions(-)
>>>>
>>>> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
>>>> index cd080468ddc9..3d643449c48c 100644
>>>> --- a/kernel/sched/fair.c
>>>> +++ b/kernel/sched/fair.c
>>>> @@ -1208,6 +1208,14 @@ static s64 update_se(struct rq *rq, struct 
>>>> sched_entity *se)
>>>>   __read_mostly unsigned int llc_overload_pct       = 50;
>>>>   __read_mostly unsigned int llc_imb_pct            = 20;
>>>> +DEFINE_STATIC_KEY_FALSE(sched_cache_allowed);
>>>> +
>>>> +static inline bool sched_cache_enabled(void)
>>>> +{
>>>> +    return sched_feat(SCHED_CACHE) &&
>>>> +        static_branch_likely(&sched_cache_allowed);
>>>> +}
>>>
>>> Urgh; do we really need _2_ static keys stacked for this? I'm thinking
>>> one should be well enough.
>>
>> SCHED_CACHE allows user space to turn on/off the feature at runtime,
>> while sched_cache_allow is a hardware capability. This capability is
> 
> isn't it possible use only static_branch_likely(&sched_cache_allowed) at 
> runtime?
> 
> Enable that key only if FEAT is set. Disable when unset.
> That way you could use only one static branch at runtime.
> 

Oh, do you mean only using sched_cache_allowed in sched_cache_enabled()?
I misunderstood that Peter suggested introducing only one key. I did
not quite catch up,  do you mean, we should monitor the switch of FEAT
and modify sched_cache_allowed when needed, and the OS only queries
the sched_cache_allowed  at runtime? I'll take a deeper look tomorrow.

Oh, do you mean only using sched_cache_allowed in sched_cache_enabled()?
I misunderstood that Peter suggested introducing only one key. But I didn't
quite catch up - do you mean we should monitor the switch of FEAT, modify
sched_cache_allowed when needed, and that the OS only queries 
sched_cache_allowed
at runtime?

> Also, I am not sure if the FEATURE should be true by default. I know it 
> maybe unused but
> IMO it should be true by default only when its proven there are no 
> regression.

Yes we tried very hard to not bring regressions during the past.

> One should be aware of their topology to enable it.
>>   disabled if there are no multiple LLCs within one node. I’m not sure
>> if using one key could support the above two scenarios.
>> It is possible to have multiple NUMA nodes. One node may have multiple 
>> LLC while other
> one may have only 1 LLC. what happens in that case?
> 

In this case, it will be enabled, and the cache-aware load balancing
will occur on that node with multiple LLCs. (Only a domain with
SD_SHARE_LLC set, and whose parent domain does not have SD_SHARE_LLC
set, will initiate the cache-aware load balancing.)


thanks,
Chenyu

> I am yet to go through the series(hopefully this week). Maybe its 
> handled already.