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Message-ID: <90cb8d1b-ebed-434e-9efd-9357e10a6ee0@linaro.org>
Date: Wed, 15 Oct 2025 21:57:17 +0300
From: Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
To: Vikram Sharma <quic_vikramsa@...cinc.com>, bryan.odonoghue@...aro.org,
mchehab@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, andersson@...nel.org, konradybcio@...nel.org,
hverkuil-cisco@...all.nl, cros-qcom-dts-watchers@...omium.org,
catalin.marinas@....com, will@...nel.org
Cc: linux-arm-kernel@...ts.infradead.org, quic_svankada@...cinc.com,
quic_nihalkum@...cinc.com, linux-media@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Ravi Shankar <quic_rshankar@...cinc.com>,
Vishal Verma <quic_vishverm@...cinc.com>
Subject: Re: [PATCH v4 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions
On 10/15/25 16:13, Vikram Sharma wrote:
> From: Nihal Kumar Gupta <quic_nihalkum@...cinc.com>
>
> Qualcomm QCS8300 SoC contains 3 Camera Control Interface (CCI). Compared
> to lemans, the key difference is in SDA/SCL GPIO assignments and number
> of CCIs.
>
> Co-developed-by: Ravi Shankar <quic_rshankar@...cinc.com>
> Signed-off-by: Ravi Shankar <quic_rshankar@...cinc.com>
> Co-developed-by: Vishal Verma <quic_vishverm@...cinc.com>
> Signed-off-by: Vishal Verma <quic_vishverm@...cinc.com>
> Co-developed-by: Suresh Vankadara <quic_svankada@...cinc.com>
> Signed-off-by: Suresh Vankadara <quic_svankada@...cinc.com>
> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@...cinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 303 ++++++++++++++++++++++++++
> 1 file changed, 303 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> index 75fafbcea845..8f2b5f40ce14 100644
> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> @@ -4769,6 +4769,117 @@ videocc: clock-controller@...0000 {
> #power-domain-cells = <1>;
> };
>
> + cci0: cci@...3000 {
> + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci";
> + reg = <0x0 0x0ac13000 0x0 0x1000>;
> +
> + interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
> +
> + clocks = <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CCI_0_CLK>;
> + clock-names = "cpas_ahb",
> + "cci";
> +
> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> +
> + pinctrl-0 = <&cci0_i2c0_default &cci0_i2c1_default>;
> + pinctrl-1 = <&cci0_i2c0_sleep &cci0_i2c1_sleep>;
> + pinctrl-names = "default", "sleep";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + status = "disabled";
Please remove empty lines between individual properties above and in two
other introduced device tree nodes.
> +
> + cci0_i2c0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + cci0_i2c1: i2c-bus@1 {
> + reg = <1>;
> + clock-frequency = <1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> + cci1: cci@...4000 {
> + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci";
> + reg = <0x0 0x0ac14000 0x0 0x1000>;
> +
> + interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;
> +
> + clocks = <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CCI_1_CLK>;
> + clock-names = "cpas_ahb",
> + "cci";
> +
> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> +
> + pinctrl-0 = <&cci1_i2c0_default &cci1_i2c1_default>;
> + pinctrl-1 = <&cci1_i2c0_sleep &cci1_i2c1_sleep>;
> + pinctrl-names = "default", "sleep";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + status = "disabled";
> +
> + cci1_i2c0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + cci1_i2c1: i2c-bus@1 {
> + reg = <1>;
> + clock-frequency = <1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> + cci2: cci@...5000 {
> + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci";
> + reg = <0x0 0x0ac15000 0x0 0x1000>;
> +
> + interrupts = <GIC_SPI 651 IRQ_TYPE_EDGE_RISING>;
> +
> + clocks = <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CCI_2_CLK>;
> + clock-names = "cpas_ahb",
> + "cci";
> +
> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> +
> + pinctrl-0 = <&cci2_i2c0_default &cci2_i2c1_default>;
> + pinctrl-1 = <&cci2_i2c0_sleep &cci2_i2c1_sleep>;
> + pinctrl-names = "default", "sleep";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + status = "disabled";
> +
> + cci2_i2c0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + cci2_i2c1: i2c-bus@1 {
> + reg = <1>;
> + clock-frequency = <1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> camss: isp@...8000 {
> compatible = "qcom,qcs8300-camss";
>
> @@ -5063,6 +5174,198 @@ tlmm: pinctrl@...0000 {
> #interrupt-cells = <2>;
> wakeup-parent = <&pdc>;
>
> + cci0_i2c0_default: cci0-0-default-state {
I'd suggest to rename cciX_i2cY_* to cciX_Y_* to shorten the labels,
also it will match device tree nodes. Here "i2c" suffix brings no
valuable information.
Please reference to lemans.dtsi and sm8550.dtsi examples.
> + sda-pins {
> + pins = "gpio57";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> +
> + scl-pins {
> + pins = "gpio58";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> + };
> +
> + cci0_i2c0_sleep: cci0-0-sleep-state {
> + sda-pins {
> + pins = "gpio57";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + scl-pins {
> + pins = "gpio58";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +
> + cci0_i2c1_default: cci0-1-default-state {
> + sda-pins {
> + pins = "gpio29";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> +
> + scl-pins {
> + pins = "gpio30";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> + };
> +
> + cci0_i2c1_sleep: cci0-1-sleep-state {
> + sda-pins {
> + pins = "gpio29";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + scl-pins {
> + pins = "gpio30";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +
> + cci1_i2c0_default: cci1-0-default-state {
> + sda-pins {
> + pins = "gpio59";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> +
> + scl-pins {
> + pins = "gpio60";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> + };
> +
> + cci1_i2c0_sleep: cci1-0-sleep-state {
> + sda-pins {
> + pins = "gpio59";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + scl-pins {
> + pins = "gpio60";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +
> + cci1_i2c1_default: cci1-1-default-state {
> + sda-pins {
> + pins = "gpio31";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> +
> + scl-pins {
> + pins = "gpio32";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> + };
> +
> + cci1_i2c1_sleep: cci1-1-sleep-state {
> + sda-pins {
> + pins = "gpio31";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + scl-pins {
> + pins = "gpio32";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +
> + cci2_i2c0_default: cci2-0-default-state {
> + sda-pins {
> + pins = "gpio61";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> +
> + scl-pins {
> + pins = "gpio62";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> + };
> +
> + cci2_i2c0_sleep: cci2-0-sleep-state {
> + sda-pins {
> + pins = "gpio61";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + scl-pins {
> + pins = "gpio62";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +
> + cci2_i2c1_default: cci2-1-default-state {
> + sda-pins {
> + pins = "gpio54";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> +
> + scl-pins {
> + pins = "gpio55";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
> + };
> + };
> +
> + cci2_i2c1_sleep: cci2-1-sleep-state {
> + sda-pins {
> + pins = "gpio54";
> + function = "cci_i2c_sda";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + scl-pins {
> + pins = "gpio55";
> + function = "cci_i2c_scl";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +
> hs0_mi2s_active: hs0-mi2s-active-state {
> pins = "gpio106", "gpio107", "gpio108", "gpio109";
> function = "hs0_mi2s";
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
--
Best wishes,
Vladimir
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