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Message-Id: <20251015030428.2980427-8-hongxing.zhu@nxp.com>
Date: Wed, 15 Oct 2025 11:04:24 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: frank.li@....com,
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Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v6 07/11] arm64: dts: imx8qxp-mek: Add supports-clkreq property to PCIe M.2 port
According to PCIe r6.1, sec 5.5.1.
The following rules define how the L1.1 and L1.2 substates are entered:
Both the Upstream and Downstream Ports must monitor the logical state of
the CLKREQ# signal.
Typical implement is using open drain, which connect RC's clkreq# to
EP's clkreq# together and pull up clkreq#.
imx8qxp-mek matches this requirement, so add supports-clkreq to allow
PCIe device enter ASPM L1 Sub-State.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 7b03374455410..9c457c2236a61 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -631,6 +631,7 @@ &pcie0 {
pinctrl-names = "default";
reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcieb>;
+ supports-clkreq;
status = "okay";
};
--
2.37.1
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