linux-kernel - Re: [PATCH 3/4] KVM: selftests: Add VM_MODE_PXXV57

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Message-ID: <aPAnWWmo555uB0-H@google.com>
Date: Wed, 15 Oct 2025 15:59:37 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: Jim Mattson <jmattson@...gle.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>, Shuah Khan <shuah@...nel.org>, 
	Bibo Mao <maobibo@...ngson.cn>, Huacai Chen <chenhuacai@...nel.org>, 
	Andrew Jones <ajones@...tanamicro.com>, Claudio Imbrenda <imbrenda@...ux.ibm.com>, 
	"Pratik R. Sampat" <prsampat@....com>, Kai Huang <kai.huang@...el.com>, 
	Eric Auger <eric.auger@...hat.com>, linux-kernel@...r.kernel.org, kvm@...r.kernel.org, 
	linux-kselftest@...r.kernel.org
Subject: Re: [PATCH 3/4] KVM: selftests: Add VM_MODE_PXXV57_4K VM mode

On Wed, Sep 17, 2025, Jim Mattson wrote:
> Add a new VM mode, VM_MODE_PXXV57_4K, to support tests that require
> 5-level paging on x86. This mode sets up a 57-bit virtual address
> space and sets CR4.LA57 in the guest.
> @@ -358,6 +360,25 @@ struct kvm_vm *____vm_create(struct vm_shape shape)
>  		vm->va_bits = 48;
>  #else
>  		TEST_FAIL("VM_MODE_PXXV48_4K not supported on non-x86 platforms");
> +#endif
> +		break;
> +	case VM_MODE_PXXV57_4K:
> +#ifdef __x86_64__
> +		kvm_get_cpu_address_width(&vm->pa_bits, &vm->va_bits);
> +		kvm_init_vm_address_properties(vm);
> +		/*
> +		 * For 5-level paging, KVM requires LA57 to be enabled, which
> +		 * requires a 57-bit virtual address space.
> +		 */
> +		TEST_ASSERT(vm->va_bits == 57,
> +			    "Linear address width (%d bits) not supported for VM_MODE_PXXV57_4K",
> +			    vm->va_bits);
> +		pr_debug("Guest physical address width detected: %d\n",
> +			 vm->pa_bits);
> +		vm->pgtable_levels = 5;
> +		vm->va_bits = 57;
> +#else
> +		TEST_FAIL("VM_MODE_PXXV57_4K not supported on non-x86 platforms");
>  #endif

That's a lot of copy+paste, especially given the #ifdefs.  How about this (untested)?

	case VM_MODE_PXXV48_4K:
	case VM_MODE_PXXV57_4K:
#ifdef __x86_64__
		kvm_get_cpu_address_width(&vm->pa_bits, &vm->va_bits);
		kvm_init_vm_address_properties(vm);

		/*
		 * Ignore KVM support for 5-level paging (vm->va_bits == 57) if
		 * the target mode is 4-level paging (48-bit virtual address
		 * space), as 5-level paging only takes effect if CR4.LA57=1.
		 */
		TEST_ASSERT(vm->va_bits == 57 ||
			    (vm->va_bits == 48 && vm->mode == VM_MODE_PXXV48_4K),
			    "Linear address width (%d bits) not supported",
			    vm->va_bits);
		pr_debug("Guest physical address width detected: %d\n",
			 vm->pa_bits);
		if (vm->mode == VM_MODE_PXXV48_4K) {
			vm->pgtable_levels = 4;
			vm->va_bits = 48;
		} else {
			vm->pgtable_levels = 5;
			vm->va_bits = 57;
		}
#else
		TEST_FAIL("VM_MODE_PXXV{48,57}_4K not supported on non-x86 platforms");
#endif
		break;