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Message-Id: <b9bcc7542afae659d01553c5559e28e4f01966b1.1760486497.git.khairul.anuar.romli@altera.com>
Date: Wed, 15 Oct 2025 08:13:38 +0800
From: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
To: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
dmaengine@...r.kernel.org (open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM),
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS),
linux-kernel@...r.kernel.org (open list),
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Niravkumar L Rabara <niravkumar.l.rabara@...el.com>,
linux-mtd@...ts.infradead.org (open list:CADENCE NAND DRIVER),
Dinh Nguyen <dinguyen@...nel.org>,
Khairul Anuar Romli <khairul.anuar.romli@...era.com>,
Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
Subject: [PATCH 2/3] dt-bindings: dma: snps,dw-axi-dmac: Add iommu property
Agilex5 integrates an ARM SMMU v3 (System Memory Management Unit) with
dedicated Translation Buffer Units (TBUs) assigned to various peripherals,
including the Synopsys DesignWare AXI DMA controller.
Each TBU handles address translation for its associated device by mapping
stream IDs to memory access permissions and virtual-to-physical address
mappings via the SMMU core.
The DesignWare AXI DMAC instances on Agilex5 are connected to their
respective TBUs. These TBUs forward DMA transactions from the controller
through the SMMU, enabling IOMMU-based features such as:
- Address translation for DMA operations
- Isolation and protection of memory regions accessed by the DMA controller
- Support for secure and virtualized environments through enforced access
control
To support this configuration, the `iommus` property must be added to the
binding schema for `snps,dw-axi-dmac`. This allows the device tree to
associate each DMA controller with the correct SMMU stream ID, enabling
the Linux IOMMU framework to configure translation contexts at runtime.
This change documents the IOMMU support for the DMA controller on Agilex5
and allows proper integration with the SMMUv3 hardware.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
---
Changes in v3:
- Refined commit messages with detailed hardware descriptions.
- Remove redundant commit message and add hardware use for iommu.
Changes in v2:
- Updated the commit message to clarify the need for the changes
and the hardware used of this changes.
---
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index 935735a59afd..a393a33c8908 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -42,6 +42,9 @@ properties:
minItems: 1
maxItems: 8
+ iommus:
+ maxItems: 1
+
clocks:
items:
- description: Bus Clock
--
2.35.3
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