linux-kernel - Re: [PATCH v2 0/3] Add edp reference clock for lemans

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Message-ID: <4bd619e7-e9ca-44a8-9d36-10c18d7a8157@quicinc.com>
Date: Wed, 15 Oct 2025 14:49:08 +0530
From: Ritesh Kumar <quic_riteshk@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
CC: <robin.clark@....qualcomm.com>, <lumag@...nel.org>,
        <abhinav.kumar@...ux.dev>, <jessica.zhang@....qualcomm.com>,
        <sean@...rly.run>, <marijn.suijten@...ainline.org>,
        <maarten.lankhorst@...ux.intel.com>, <mripard@...nel.org>,
        <tzimmermann@...e.de>, <airlied@...il.com>, <simona@...ll.ch>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <quic_mahap@...cinc.com>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <mani@...nel.org>,
        <James.Bottomley@...senpartnership.com>, <martin.petersen@...cle.com>,
        <vkoul@...nel.org>, <kishon@...nel.org>,
        <cros-qcom-dts-watchers@...omium.org>, <linux-phy@...ts.infradead.org>,
        <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-scsi@...r.kernel.org>,
        <quic_vproddut@...cinc.com>
Subject: Re: [PATCH v2 0/3] Add edp reference clock for lemans


On 10/13/2025 6:04 PM, Dmitry Baryshkov wrote:
> On Mon, Oct 13, 2025 at 04:18:03PM +0530, Ritesh Kumar wrote:
> > On lemans chipset, edp reference clock is being voted by ufs mem phy
> > (ufs_mem_phy: phy@...7000). But after commit 77d2fa54a9457
> > ("scsi: ufs: qcom : Refactor phy_power_on/off calls") edp reference
> > clock is getting turned off, leading to below phy poweron failure on
> > lemans edp phy.
>
> How does UFS turn on eDP reference clock?

In lemans, GCC_EDP_REF_CLKREF_EN is voted as qref clock in ufs_mem_phy.


ufs_mem_phy: phy@...7000 {
     compatible = "qcom,sa8775p-qmp-ufs-phy";
     reg = <0x0 0x01d87000 0x0 0xe10>;
     /*
      * Yes, GCC_EDP_REF_CLKREF_EN is correct in qref. It
      * enables the CXO clock to eDP *and* UFS PHY.
      */
     clocks = <&rpmhcc RPMH_CXO_CLK>,
              <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
              <&gcc GCC_EDP_REF_CLKREF_EN>;
     clock-names = "ref", "ref_aux", "qref";

>
>