linux-kernel - Re: [PATCH v1 2/7] dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20251016-countable-probing-062cd0504baf@spud>
Date: Thu, 16 Oct 2025 16:51:33 +0100
From: Conor Dooley <conor@...nel.org>
To: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
Cc: Hal Feng <hal.feng@...rfivetech.com>, devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Conor Dooley <conor+dt@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	"Rafael J . Wysocki" <rafael@...nel.org>,
	Viresh Kumar <viresh.kumar@...aro.org>,
	Emil Renner Berthing <emil.renner.berthing@...onical.com>,
	E Shattow <e@...eshell.de>, Paul Walmsley <pjw@...nel.org>,
	Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v1 2/7] dt-bindings: PCI: starfive,jh7110-pcie: Add
 enable-gpios property

On Thu, Oct 16, 2025 at 10:58:41AM +0200, Heinrich Schuchardt wrote:
> On 10/16/25 10:00, Hal Feng wrote:
> > Add enable-gpios property for controlling the PCI bus device power.
> > This property had been supported in the driver but not added in the
> > dt-bindings.
> > 
> > Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe controller")
> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> > ---
> >   .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml         | 4 ++++
> >   1 file changed, 4 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > index 5f432452c815..f254c7111837 100644
> > --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > @@ -60,6 +60,10 @@ properties:
> >       description:
> >         The phandle to System Register Controller syscon node.
> > +  enable-gpios:
> > +    description: GPIO used to enable the PCI bus device power
> > +    maxItems: 1
> > +
> 
> Shouldn't we try to keep the entries alphabetically ordered?

Grouping the two gpios together also has some value. I don't think it's
particularly important which way it is done.

Acked-by: Conor Dooley <conor.dooley@...rochip.com>
pw-bot: not-applicable

> 
> Otherwise looks good.
> 
> Best regards
> 
> Heinrich
> 
> >     perst-gpios:
> >       description: GPIO controlled connection to PERST# signal
> >       maxItems: 1
> 
> 

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)