linux-kernel - RE: [RFC PATCH 40/56] x86/alternative: Use sync_core_nmi

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Message-ID:
 <DS0PR12MB92733EEEF2FDF39045008EEC94E9A@DS0PR12MB9273.namprd12.prod.outlook.com>
Date: Thu, 16 Oct 2025 18:56:41 +0000
From: "Kaplan, David" <David.Kaplan@....com>
To: Peter Zijlstra <peterz@...radead.org>
CC: Thomas Gleixner <tglx@...utronix.de>, Borislav Petkov <bp@...en8.de>, Josh
 Poimboeuf <jpoimboe@...nel.org>, Pawan Gupta
	<pawan.kumar.gupta@...ux.intel.com>, Ingo Molnar <mingo@...hat.com>, Dave
 Hansen <dave.hansen@...ux.intel.com>, "x86@...nel.org" <x86@...nel.org>, "H .
 Peter Anvin" <hpa@...or.com>, Alexander Graf <graf@...zon.com>, Boris
 Ostrovsky <boris.ostrovsky@...cle.com>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [RFC PATCH 40/56] x86/alternative: Use sync_core_nmi_safe()

[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Peter Zijlstra <peterz@...radead.org>
> Sent: Thursday, October 16, 2025 1:53 PM
> To: Kaplan, David <David.Kaplan@....com>
> Cc: Thomas Gleixner <tglx@...utronix.de>; Borislav Petkov <bp@...en8.de>; Josh
> Poimboeuf <jpoimboe@...nel.org>; Pawan Gupta
> <pawan.kumar.gupta@...ux.intel.com>; Ingo Molnar <mingo@...hat.com>; Dave
> Hansen <dave.hansen@...ux.intel.com>; x86@...nel.org; H . Peter Anvin
> <hpa@...or.com>; Alexander Graf <graf@...zon.com>; Boris Ostrovsky
> <boris.ostrovsky@...cle.com>; linux-kernel@...r.kernel.org
> Subject: Re: [RFC PATCH 40/56] x86/alternative: Use sync_core_nmi_safe()
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Thu, Oct 16, 2025 at 03:34:14PM +0000, Kaplan, David wrote:
>
> > I will note that on AMD, MFENCE has the required serializing
> > properties (like SERIALIZE).  On AMD, we could use MFENCE in
> > sync_core() which is probably faster that iret_to_self().  But
> > again...do we really care.
>
> About faster, no. But MFENCE has the benefit of not causing VMEXITs and
> also not being IRET, so I'm not opposed to you using that as an AMD
> version of SERIALIZE for the time being.

Ok.  Btw, how long has Intel supported SERIALIZE?

Do we even need a 'mov-cr2' version of sync_core or could we say that dynamic mitigations requires a CPU capable of either a serializing MFENCE or SERIALIZE.

--David Kaplan