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Message-ID: <a4c5e7fd-a37d-4729-ad58-81523f813fb3@canonical.com>
Date: Thu, 16 Oct 2025 10:58:41 +0200
From: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
To: Hal Feng <hal.feng@...rfivetech.com>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
 linux-kernel@...r.kernel.org, Conor Dooley <conor+dt@...nel.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Palmer Dabbelt <palmer@...belt.com>, "Rafael J . Wysocki"
 <rafael@...nel.org>, Viresh Kumar <viresh.kumar@...aro.org>,
 Emil Renner Berthing <emil.renner.berthing@...onical.com>,
 E Shattow <e@...eshell.de>, Paul Walmsley <pjw@...nel.org>,
 Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v1 2/7] dt-bindings: PCI: starfive,jh7110-pcie: Add
 enable-gpios property

On 10/16/25 10:00, Hal Feng wrote:
> Add enable-gpios property for controlling the PCI bus device power.
> This property had been supported in the driver but not added in the
> dt-bindings.
> 
> Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe controller")
> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
>   .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml         | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> index 5f432452c815..f254c7111837 100644
> --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> @@ -60,6 +60,10 @@ properties:
>       description:
>         The phandle to System Register Controller syscon node.
>   
> +  enable-gpios:
> +    description: GPIO used to enable the PCI bus device power
> +    maxItems: 1
> +

Shouldn't we try to keep the entries alphabetically ordered?

Otherwise looks good.

Best regards

Heinrich

>     perst-gpios:
>       description: GPIO controlled connection to PERST# signal
>       maxItems: 1


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