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Message-ID: <a5f19be8-d063-49bf-951d-cc7f14b64987@collabora.com>
Date: Thu, 16 Oct 2025 13:29:19 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Sjoerd Simons <sjoerd@...labora.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
 Ryder Lee <ryder.lee@...iatek.com>, Jianjun Wang
 <jianjun.wang@...iatek.com>, Bjorn Helgaas <bhelgaas@...gle.com>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof WilczyƄski <kwilczynski@...nel.org>,
 Manivannan Sadhasivam <mani@...nel.org>,
 Chunfeng Yun <chunfeng.yun@...iatek.com>, Vinod Koul <vkoul@...nel.org>,
 Kishon Vijay Abraham I <kishon@...nel.org>, Lee Jones <lee@...nel.org>,
 Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Lorenzo Bianconi <lorenzo@...nel.org>, Felix Fietkau <nbd@....name>
Cc: kernel@...labora.com, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-mediatek@...ts.infradead.org, linux-pci@...r.kernel.org,
 linux-phy@...ts.infradead.org, netdev@...r.kernel.org,
 Daniel Golle <daniel@...rotopia.org>, Bryan Hinton <bryan@...anhinton.com>
Subject: Re: [PATCH 07/15] arm64: dts: mediatek: mt7981b: Add PCIe and USB
 support

Il 16/10/25 12:08, Sjoerd Simons ha scritto:
> Add device tree nodes for PCIe controller and USB3 XHCI host
> controller on MT7981B SoC. Both controllers share the USB3 PHY
> which can be configured for either USB3 or PCIe operation.
> 
> The USB3 XHCI controller supports USB 2.0 and USB 3.0 SuperSpeed
> operation. The PCIe controller is compatible with PCIe Gen2
> specifications.
> 
> Also add the topmisc syscon node required for USB/PCIe PHY
> multiplexing.
> 
> Signed-off-by: Sjoerd Simons <sjoerd@...labora.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 82 +++++++++++++++++++++++++++++++
>   1 file changed, 82 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> index b477375078ccd..13950fe6e8766 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> @@ -2,6 +2,7 @@
>   
>   #include <dt-bindings/clock/mediatek,mt7981-clk.h>
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/phy/phy.h>
>   #include <dt-bindings/reset/mt7986-resets.h>
>   
>   / {
> @@ -221,6 +222,57 @@ auxadc: adc@...0d000 {
>   			status = "disabled";
>   		};
>   
> +		xhci: usb@...00000 {
> +			compatible = "mediatek,mt7986-xhci", "mediatek,mtk-xhci";
> +			reg = <0 0x11200000 0 0x2e00>,
> +			      <0 0x11203e00 0 0x0100>;

reg fits in one line.

> +			reg-names = "mac", "ippc";
> +			clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
> +				 <&infracfg CLK_INFRA_IUSB_CK>,
> +				 <&infracfg CLK_INFRA_IUSB_133_CK>,
> +				 <&infracfg CLK_INFRA_IUSB_66M_CK>,
> +				 <&topckgen CLK_TOP_U2U3_XHCI_SEL>;
> +			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
> +			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> +			phys = <&u2port0 PHY_TYPE_USB2>,
> +			       <&u3port0 PHY_TYPE_USB3>;

phys fits in one line.

Other than that, looks good; after applying the proposed changes:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>



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