linux-kernel - [PATCH 1/2] dt-bindings: clock: Update identifiers for VIIF on Toshiba Visconti TMPV770x SoC

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Message-Id: <20251016013328.303611-2-yuji2.ishikawa@toshiba.co.jp>
Date: Thu, 16 Oct 2025 10:33:27 +0900
From: Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>
To: Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@...l.toshiba>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: [PATCH 1/2] dt-bindings: clock: Update identifiers for VIIF on Toshiba Visconti TMPV770x SoC

Update identifiers for the clocks and the resets of Video Input Interface
in order to reflect the actual architecture of TMPV770x SoC.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>
---
 include/dt-bindings/clock/toshiba,tmpv770x.h | 33 +++++++++++++-------
 include/dt-bindings/reset/toshiba,tmpv770x.h | 10 +++++-
 2 files changed, 31 insertions(+), 12 deletions(-)

diff --git a/include/dt-bindings/clock/toshiba,tmpv770x.h b/include/dt-bindings/clock/toshiba,tmpv770x.h
index 5fce713001..2dbd5885c0 100644
--- a/include/dt-bindings/clock/toshiba,tmpv770x.h
+++ b/include/dt-bindings/clock/toshiba,tmpv770x.h
@@ -94,10 +94,10 @@
 #define TMPV770X_CLK_DSP2_PBCLK		77
 #define TMPV770X_CLK_DSP3_PBCLK		78
 #define TMPV770X_CLK_DSVIIF0_APBCLK	79
-#define TMPV770X_CLK_VIIF0_APBCLK	80
-#define TMPV770X_CLK_VIIF0_CFGCLK	81
-#define TMPV770X_CLK_VIIF1_APBCLK	82
-#define TMPV770X_CLK_VIIF1_CFGCLK	83
+#define TMPV770X_CLK_VIIFBS0_APB	80
+#define TMPV770X_CLK_VIIFBS0_CFG	81
+#define TMPV770X_CLK_VIIFBS1_APB	82
+#define TMPV770X_CLK_VIIFBS1_CFG	83
 #define TMPV770X_CLK_VIIF2_APBCLK	84
 #define TMPV770X_CLK_VIIF2_CFGCLK	85
 #define TMPV770X_CLK_VIIF3_APBCLK	86
@@ -121,11 +121,11 @@
 #define TMPV770X_CLK_PYRAMID		104
 #define TMPV770X_CLK_HWA2_ASYNC		105
 #define TMPV770X_CLK_DSP0		106
-#define TMPV770X_CLK_VIIFBS0		107
-#define TMPV770X_CLK_VIIFBS0_L2ISP	108
-#define TMPV770X_CLK_VIIFBS0_L1ISP	109
-#define TMPV770X_CLK_VIIFBS0_PROC	110
-#define TMPV770X_CLK_VIIFBS1		111
+#define TMPV770X_CLK_VIIFBS0_PROC	107
+#define TMPV770X_CLK_VIIF0_L2ISP	108
+#define TMPV770X_CLK_VIIF0_L1ISP	109
+#define TMPV770X_CLK_VIIF0_PROC		110
+#define TMPV770X_CLK_VIIFBS1_PROC	111
 #define TMPV770X_CLK_VIIFBS2		112
 #define TMPV770X_CLK_VIIFOP_MBUS	113
 #define TMPV770X_CLK_VIIFOP0_PROC	114
@@ -141,7 +141,10 @@
 #define TMPV770X_CLK_PIREFCLK		124
 #define TMPV770X_CLK_SBUS		125
 #define TMPV770X_CLK_BUSLCK		126
-#define TMPV770X_NR_CLK			127
+#define TMPV770X_CLK_VIIF1_L2ISP	127
+#define TMPV770X_CLK_VIIF1_L1ISP	128
+#define TMPV770X_CLK_VIIF1_PROC		129
+#define TMPV770X_NR_CLK			130
 
 /* Reset */
 #define TMPV770X_RESET_PIETHER_2P5M	0
@@ -176,6 +179,14 @@
 #define TMPV770X_RESET_PIPCMIF		29
 #define TMPV770X_RESET_PICKMON		30
 #define TMPV770X_RESET_SBUSCLK		31
-#define TMPV770X_NR_RESET		32
+#define TMPV770X_RESET_VIIFBS0		32
+#define TMPV770X_RESET_VIIFBS0_APB	33
+#define TMPV770X_RESET_VIIFBS0_L2ISP	34
+#define TMPV770X_RESET_VIIFBS0_L1ISP	35
+#define TMPV770X_RESET_VIIFBS1		36
+#define TMPV770X_RESET_VIIFBS1_APB	37
+#define TMPV770X_RESET_VIIFBS1_L2ISP	38
+#define TMPV770X_RESET_VIIFBS1_L1ISP	39
+#define TMPV770X_NR_RESET		40
 
 #endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */
diff --git a/include/dt-bindings/reset/toshiba,tmpv770x.h b/include/dt-bindings/reset/toshiba,tmpv770x.h
index c1007acb19..d711006d6b 100644
--- a/include/dt-bindings/reset/toshiba,tmpv770x.h
+++ b/include/dt-bindings/reset/toshiba,tmpv770x.h
@@ -36,6 +36,14 @@
 #define TMPV770X_RESET_PIPCMIF		29
 #define TMPV770X_RESET_PICKMON		30
 #define TMPV770X_RESET_SBUSCLK		31
-#define TMPV770X_NR_RESET		32
+#define TMPV770X_RESET_VIIFBS0		32
+#define TMPV770X_RESET_VIIFBS0_APB	33
+#define TMPV770X_RESET_VIIFBS0_L2ISP	34
+#define TMPV770X_RESET_VIIFBS0_L1ISP	35
+#define TMPV770X_RESET_VIIFBS1		36
+#define TMPV770X_RESET_VIIFBS1_APB	37
+#define TMPV770X_RESET_VIIFBS1_L2ISP	38
+#define TMPV770X_RESET_VIIFBS1_L1ISP	39
+#define TMPV770X_NR_RESET		40
 
 #endif /*_DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_ */
-- 
2.43.0