linux-kernel - RE: [RFC PATCH 08/56] x86/bugs: Reset SSB mitigations

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Message-ID:
 <LV3PR12MB926590DD6CBD277D529C239C94F6A@LV3PR12MB9265.namprd12.prod.outlook.com>
Date: Fri, 17 Oct 2025 15:56:03 +0000
From: "Kaplan, David" <David.Kaplan@....com>
To: Nikolay Borisov <nik.borisov@...e.com>, Thomas Gleixner
	<tglx@...utronix.de>, Borislav Petkov <bp@...en8.de>, Peter Zijlstra
	<peterz@...radead.org>, Josh Poimboeuf <jpoimboe@...nel.org>, Pawan Gupta
	<pawan.kumar.gupta@...ux.intel.com>, Ingo Molnar <mingo@...hat.com>, Dave
 Hansen <dave.hansen@...ux.intel.com>, "x86@...nel.org" <x86@...nel.org>, "H .
 Peter Anvin" <hpa@...or.com>
CC: Alexander Graf <graf@...zon.com>, Boris Ostrovsky
	<boris.ostrovsky@...cle.com>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [RFC PATCH 08/56] x86/bugs: Reset SSB mitigations

[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Nikolay Borisov <nik.borisov@...e.com>
> Sent: Friday, October 17, 2025 10:14 AM
> To: Kaplan, David <David.Kaplan@....com>; Thomas Gleixner
> <tglx@...utronix.de>; Borislav Petkov <bp@...en8.de>; Peter Zijlstra
> <peterz@...radead.org>; Josh Poimboeuf <jpoimboe@...nel.org>; Pawan Gupta
> <pawan.kumar.gupta@...ux.intel.com>; Ingo Molnar <mingo@...hat.com>; Dave
> Hansen <dave.hansen@...ux.intel.com>; x86@...nel.org; H . Peter Anvin
> <hpa@...or.com>
> Cc: Alexander Graf <graf@...zon.com>; Boris Ostrovsky
> <boris.ostrovsky@...cle.com>; linux-kernel@...r.kernel.org
> Subject: Re: [RFC PATCH 08/56] x86/bugs: Reset SSB mitigations
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On 10/13/25 17:33, David Kaplan wrote:
> > Add function to reset SSB mitigations back to their boot-time defaults.
> >
> > Signed-off-by: David Kaplan <david.kaplan@....com>
> > ---
> >   arch/x86/kernel/cpu/bugs.c | 24 ++++++++++++++++++++++++
> >   1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
> > index 4ca46f58e384..cc7b1b67d22d 100644
> > --- a/arch/x86/kernel/cpu/bugs.c
> > +++ b/arch/x86/kernel/cpu/bugs.c
> > @@ -380,6 +380,16 @@ static void x86_amd_ssb_disable(void)
> >               wrmsrq(MSR_AMD64_LS_CFG, msrval);
> >   }
> >
> > +static void x86_amd_ssb_enable(void)
> > +{
> > +     u64 msrval = x86_amd_ls_cfg_base;
> > +
> > +     if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
> > +             wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, 0);
> > +     else if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD))
> > +             wrmsrl(MSR_AMD64_LS_CFG, msrval);
>
> nit: No need for the local msrval variable, just pass x86_amd_ls_cfg_base.

Ok

>
> > +}
> > +
> >   #undef pr_fmt
> >   #define pr_fmt(fmt) "MDS: " fmt
> >
> > @@ -2672,6 +2682,17 @@ static void __init ssb_apply_mitigation(void)
> >       }
> >   }
> >
> > +#ifdef CONFIG_DYNAMIC_MITIGATIONS
> > +static void ssb_reset_mitigation(void)
> > +{
> > +     setup_clear_cpu_cap(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE);
> > +     x86_spec_ctrl_base &= ~SPEC_CTRL_SSBD;
> > +     nossb = false;
> > +     ssb_mode = IS_ENABLED(CONFIG_MITIGATION_SSB) ?
> > +             SPEC_STORE_BYPASS_AUTO : SPEC_STORE_BYPASS_NONE;
> > +}
> > +#endif
> > +
> >   #undef pr_fmt
> >   #define pr_fmt(fmt)     "Speculation prctl: " fmt
> >
> > @@ -2916,6 +2937,8 @@ void x86_spec_ctrl_setup_ap(void)
> >
> >       if (ssb_mode == SPEC_STORE_BYPASS_DISABLE)
> >               x86_amd_ssb_disable();
> > +     else
> > +             x86_amd_ssb_enable();
>
> Does it mean SSB hasn't been working correctly up until now since
> _enable function has been missing?
>

I think it's been ok...SSB is enabled by default out of reset, so the kernel only had to deal with potentially disabling it (setting SSBD) in this part of the logic.

--David Kaplan