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Message-ID: <20251017161334.1295955-3-ivo.ivanov.ivanov1@gmail.com>
Date: Fri, 17 Oct 2025 19:13:30 +0300
From: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>
Cc: Alim Akhtar <alim.akhtar@...sung.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/5] clk: samsung: clk-pll: Add support for pll_141xx
The PLL is similar to pll_35xx, with the exception of a different
Locktime - 150 instead of 270, as with pll_142xx.
When defining a PLL, the "con" parameter should be set to CON0
register, like this:
PLL(pll_141xx, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk",
PLL_LOCKTIME_PLL_SHARED0, PLL_CON0_PLL_SHARED0,
pll_shared0_rate_table),
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
---
Changes since V2:
- rebase on next and drop the unnecessary new line
---
drivers/clk/samsung/clk-pll.c | 4 +++-
drivers/clk/samsung/clk-pll.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index 7bea7be1d..4700eadad 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -278,7 +278,8 @@ static int samsung_pll35xx_set_rate(struct clk_hw *hw, unsigned long drate,
}
/* Set PLL lock time. */
- if (pll->type == pll_142xx || pll->type == pll_1017x)
+ if (pll->type == pll_142xx || pll->type == pll_1017x ||
+ pll->type == pll_141xx)
writel_relaxed(rate->pdiv * PLL142XX_LOCK_FACTOR,
pll->lock_reg);
else
@@ -1497,6 +1498,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
case pll_1451x:
case pll_1452x:
case pll_142xx:
+ case pll_141xx:
case pll_1017x:
pll->enable_offs = PLL35XX_ENABLE_SHIFT;
pll->lock_offs = PLL35XX_LOCK_STAT_SHIFT;
diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index 6c8bb7f26..3c7575cde 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h
@@ -51,6 +51,7 @@ enum samsung_pll_type {
pll_4311,
pll_1017x,
pll_1031x,
+ pll_141xx,
};
#define PLL_RATE(_fin, _m, _p, _s, _k, _ks) \
--
2.43.0
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