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Message-ID: <20251017162736.45368-4-iam@lach.pw>
Date: Fri, 17 Oct 2025 18:27:32 +0200
From: Yaroslav Bolyukin <iam@...h.pw>
To: Ville Syrjälä <ville.syrjala@...ux.intel.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: Harry Wentland <harry.wentland@....com>,
Leo Li <sunpeng.li@....com>,
Rodrigo Siqueira <siqueira@...lia.com>,
Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
Wayne Lin <Wayne.Lin@....com>,
amd-gfx@...ts.freedesktop.org,
linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
Yaroslav Bolyukin <iam@...h.pw>
Subject: [PATCH v5 3/7] drm/edid: MSO should only be used for non-eDP displays
As per DisplayID v2.1a spec:
If Offset 06h[2:0] is programmed to 001b (External DisplayPort), this field shallbe cleared to 00b (Not supported).
Ref: https://lore.kernel.org/lkml/3abc1087618c822e5676e67a3ec2e64e506dc5ec@intel.com/
Signed-off-by: Yaroslav Bolyukin <iam@...h.pw>
---
drivers/gpu/drm/drm_displayid_internal.h | 4 +++
drivers/gpu/drm/drm_edid.c | 36 +++++++++++++++---------
2 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_displayid_internal.h b/drivers/gpu/drm/drm_displayid_internal.h
index 957dd0619f5c..cf02647b41b4 100644
--- a/drivers/gpu/drm/drm_displayid_internal.h
+++ b/drivers/gpu/drm/drm_displayid_internal.h
@@ -142,9 +142,13 @@ struct displayid_formula_timing_block {
struct displayid_formula_timings_9 timings[];
} __packed;
+#define DISPLAYID_VESA_DP_TYPE GENMASK(2, 0)
#define DISPLAYID_VESA_MSO_OVERLAP GENMASK(3, 0)
#define DISPLAYID_VESA_MSO_MODE GENMASK(6, 5)
+#define DISPLAYID_VESA_DP_TYPE_EDP 0
+#define DISPLAYID_VESA_DP_TYPE_DP 1
+
struct displayid_vesa_vendor_specific_block {
struct displayid_block base;
u8 oui[3];
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 725ae5f9d160..13df2854617c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6530,6 +6530,7 @@ static void drm_parse_vesa_specific_block(struct drm_connector *connector,
struct displayid_vesa_vendor_specific_block *vesa =
(struct displayid_vesa_vendor_specific_block *)block;
struct drm_display_info *info = &connector->display_info;
+ int dp_type;
if (block->num_bytes < 3) {
drm_dbg_kms(connector->dev,
@@ -6548,20 +6549,29 @@ static void drm_parse_vesa_specific_block(struct drm_connector *connector,
return;
}
- switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) {
- default:
- drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved MSO mode value\n",
+ dp_type = FIELD_GET(DISPLAYID_VESA_DP_TYPE, vesa->data_structure_type);
+ if (dp_type > 1) {
+ drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved dp type value\n",
connector->base.id, connector->name);
- fallthrough;
- case 0:
- info->mso_stream_count = 0;
- break;
- case 1:
- info->mso_stream_count = 2; /* 2 or 4 links */
- break;
- case 2:
- info->mso_stream_count = 4; /* 4 links */
- break;
+ }
+
+ /* MSO is not supported for eDP */
+ if (dp_type != DISPLAYID_VESA_DP_TYPE_EDP) {
+ switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) {
+ default:
+ drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved MSO mode value\n",
+ connector->base.id, connector->name);
+ fallthrough;
+ case 0:
+ info->mso_stream_count = 0;
+ break;
+ case 1:
+ info->mso_stream_count = 2; /* 2 or 4 links */
+ break;
+ case 2:
+ info->mso_stream_count = 4; /* 4 links */
+ break;
+ }
}
if (info->mso_stream_count) {
--
2.51.0
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