linux-kernel - Re: [PATCH 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20251017-anthem-duplicity-c96e4253d986@spud>
Date: Fri, 17 Oct 2025 16:45:43 +0100
From: Conor Dooley <conor@...nel.org>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
	Linus Walleij <linus.walleij@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Magnus Damm <magnus.damm@...il.com>,
	linux-renesas-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	Biju Das <biju.das.jz@...renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document
 pin configuration properties

On Fri, Oct 17, 2025 at 04:33:56PM +0100, Lad, Prabhakar wrote:
> Hi Conor,
> 
> Thank you for the review.
> 
> On Thu, Oct 16, 2025 at 5:41 PM Conor Dooley <conor@...nel.org> wrote:
> >
> > On Tue, Oct 14, 2025 at 08:11:20PM +0100, Prabhakar wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > >
> > > Document the pin configuration properties supported by the RZ/T2H pinctrl
> > > driver. The RZ/T2H SoC supports configuring various electrical properties
> > > through the DRCTLm (I/O Buffer Function Switching) registers.
> > >
> > > Add documentation for the following standard properties:
> > > - bias-disable, bias-pull-up, bias-pull-down: Control internal
> > >   pull-up/pull-down resistors (3 options: no pull, pull-up, pull-down)
> > > - input-schmitt-enable, input-schmitt-disable: Control Schmitt trigger
> > >   input
> > > - slew-rate: Control output slew rate (2 options: slow/fast)
> > >
> > > Add documentation for the custom property:
> > > - renesas,drive-strength: Control output drive strength using discrete
> > >   levels (0-3) representing low, medium, high, and ultra high strength.
> > >   This custom property is needed because the hardware uses fixed discrete
> > >   levels rather than configurable milliamp values.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > > ---
> > >  .../bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml | 13 +++++++++++++
> > >  1 file changed, 13 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml
> > > index 36d665971484..9085d5cfb1c8 100644
> > > --- a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml
> > > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml
> > > @@ -72,6 +72,19 @@ definitions:
> > >        input: true
> > >        input-enable: true
> > >        output-enable: true
> > > +      bias-disable: true
> > > +      bias-pull-down: true
> > > +      bias-pull-up: true
> > > +      input-schmitt-enable: true
> > > +      input-schmitt-disable: true
> > > +      slew-rate:
> > > +        enum: [0, 1]
> >
> > What are the meanings of "0" and "1" for slew rate? Why isn't this given
> I'll add a description for it (0 = slow, 1 = fast) and the same values
> are programmed in the register to configure the slew rate.
> 
> > as the actual rates? The docs surely give more detail than just "slow"
> > and "fast".
> You mean to represent slew-rate in some sort of a unit?

Usually slew-rate is measured in a unit derived from volts per second.
What rates do "slow" and "fast" actually represent?

> > > +      renesas,drive-strength:
> > > +        description:
> > > +          Drive strength configuration value. Valid values are 0 to 3, representing
> > > +          increasing drive strength from low, medium, high and ultra high.
> >
> > I see what you wrote in the commit message, but I don't really get why
> > you need a custom property. I would imagine most devices only have some
> > some small set of "fixed discrete levels", yet manage with milli- or
> > micro-amps fine. Converting from mA to register values in a driver is
> > not difficult, and I figure the documentation for the device probably
> > doesn't just give vague strengths like "medium" or "ultra high", but
> > probably provides currents?
> >
> > I dunno, I am just confused by the need to shove register values into
> > these properties, rather than using the actual units.
> >
> I'm checking this with the HW team. I'll get back on this once I have
> some feedback.
> 
> Cheers,
> Prabhakar

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)