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Message-ID: <601cd8dc-afb5-4a67-af63-567814d755a4@gmail.com>
Date: Sat, 18 Oct 2025 00:34:49 +0800
From: Tianling Shen <cnsztl@...il.com>
To: Dragan Simic <dsimic@...jaro.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
Grzegorz Sterniczuk <grzegorz@...rnicz.uk>, Jonas Karlman <jonas@...boo.se>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: fix eMMC corruption on NanoPC-T6
with A3A444 chips
On 2025/10/17 23:15, Dragan Simic wrote:
> On Friday, October 17, 2025 14:08 CEST, Tianling Shen <cnsztl@...il.com> wrote:
>> On 2025/10/17 18:25, Dragan Simic wrote:
>>> On Friday, October 17, 2025 09:39 CEST, Tianling Shen <cnsztl@...il.com> wrote:
>>>> From: Grzegorz Sterniczuk <grzegorz@...rnicz.uk>
>>>>
>>>> Some NanoPC-T6 boards with A3A444 eMMC chips experience I/O errors and
>>>> corruption when using HS400 mode. Downgrade to HS200 mode to ensure
>>>> stable operation.
>>>
>>> Could you, please, provide more details about the troublesome eMMC
>>> chip that gets identified as A3A444, i.e. what's the actual brand
>>> and model? Maybe you could send a picture of it? It might also
>>> help if you'd send the contents of "/sys/class/block/mmcblkX/device
>>> /manfid" from your board (where "X" should equal two).
>>
>> Unfortunately I don't have this board nor this eMMC chip.
>> I got the chip model from my friend, it's FORESEE FEMDNN256G-A3A44,
>> manfid is 0x0000d6.
>
> Thanks for responding and providing the details so quickly!
>
>>> I'm asking for that because I'd like to research it a bit further,
>>> if possible, because some other eMMC chips that are also found on
>>> the NanoPc-T6 seem to work fine in HS400 mode. [1] It may be that
>>> the A3A444 chip has some issues with the HS400 mode on its own,
>>> i.e. the observed issues may not be caused by the board.
>>
>> Yes, it should be caused by this eMMC chip.
>
> I'd suggest that we move forward by "quirking off" the HS400 mode
> for the FEMDNN256G-A3A44 eMMC chip in the MMC drivers, instead of
> downgrading the speed of the sdhci interface on the NanoPC-T6.
>
> That way, the other similar Foresee eMMC chip that's also found
> on NanoPC-T6 boards, FEMDNN256G-A3A564, will continue to work in
> the faster HS400 mode, while the troublesome A3A44 variant will
> be downgraded to the HS200 globally for everyone's benefit. It's
> quite unlikely that the A3A44 variant fails to work reliable in
> HS400 mode on the NanoPC-T6 only, so quirking it off in the MMC
> drivers should be a sane and safe choice.
>
> If you agree with dropping this patch, I'll be more than happy
> to implement this HS200 quirk in the MMC drivers.
Yes for sure, thank you ;)
The full cid is d6010341334134343411f63ea7208700.
Thanks,
Tianling.
>
> As a note, FEMDNN256G-A3A44 is found in the Rockchip Qualified
> eMMC Support List v1.84, [2] but the evidence says the opposite,
> so we should react appropriately by adding this quirk.
>
> [1] https://github.com/openwrt/openwrt/issues/18844
> [2] https://dl.radxa.com/rock5/hw/RKeMMCSupportList%20Ver1.84_20240815.pdf
>
>>>> Signed-off-by: Grzegorz Sterniczuk <grzegorz@...rnicz.uk>
>>>> Signed-off-by: Tianling Shen <cnsztl@...il.com>
>>>> ---
>>>> arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 3 +--
>>>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
>>>> index fafeabe9adf9..5f63f38f7326 100644
>>>> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
>>>> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
>>>> @@ -717,8 +717,7 @@ &sdhci {
>>>> no-sd;
>>>> non-removable;
>>>> max-frequency = <200000000>;
>>>> - mmc-hs400-1_8v;
>>>> - mmc-hs400-enhanced-strobe;
>>>> + mmc-hs200-1_8v;
>>>> status = "okay";
>>>> };
>
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