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Message-ID: <176072211691.2071457.9418354818305517831.b4-ty@arm.com>
Date: Fri, 17 Oct 2025 18:29:20 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: linux-kernel@...r.kernel.org,
Lorenzo Pieralisi <lpieralisi@...nel.org>
Cc: Will Deacon <will@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Sascha Bischoff <sascha.bischoff@....com>,
Mark Rutland <mark.rutland@....com>,
Marc Zyngier <maz@...nel.org>
Subject: Re: [PATCH v2] arm64/sysreg: Fix GIC CDEOI instruction encoding
On Tue, 07 Oct 2025 12:26:00 +0200, Lorenzo Pieralisi wrote:
> The GIC CDEOI system instruction requires the Rt field to be set to 0b11111
> otherwise the instruction behaviour becomes CONSTRAINED UNPREDICTABLE.
>
> Currenly, its usage is encoded as a system register write, with a constant
> 0 value:
>
> write_sysreg_s(0, GICV5_OP_GIC_CDEOI)
>
> [...]
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64/sysreg: Fix GIC CDEOI instruction encoding
https://git.kernel.org/arm64/c/e9ad390a4812
--
Catalin
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