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Message-ID: <20251017190740.306780-1-elder@riscstar.com>
Date: Fri, 17 Oct 2025 14:07:32 -0500
From: Alex Elder <elder@...cstar.com>
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Subject: [PATCH v3 0/7] Introduce SpacemiT K1 PCIe phy and host controller
This series introduces a PHY driver and a PCIe driver to support PCIe
on the SpacemiT K1 SoC. The PCIe implementation is derived from a
Synopsys DesignWare PCIe IP. The PHY driver supports one combination
PCIe/USB PHY as well as two PCIe-only PHYs. The combo PHY port uses
one PCIe lane, and the other two ports each have two lanes. All PCIe
ports operate at 5 GT/second.
The PCIe PHYs must be configured using a value that can only be
determined using the combo PHY, operating in PCIe mode. To allow
that PHY to be used for USB, the calibration step is performed by
the PHY driver automatically at probe time. Once this step is done,
the PHY can be used for either PCIe or USB.
Version 3 of this series incorporates suggestions made during the
review of version 2. Specific highlights are detailed below.
-Alex
This series is available here:
https://github.com/riscstar/linux/tree/outgoing/pcie-v3
Between version 2 and version 3:
- Reviewed-by from Rob added to the first two patches
- The "num-viewport" property has been removed
- The "phy" reset is listed first in the combo PHY binding
- The PHY now requires a resets property to specify the "phy" reset
- The PCIe driver no longer requires a "phy" reset
- The PHY driver now gets and deasserts the reset for all PHYs
- Error handling and "put" of clocks in the PHY driver has been
corrected (for clk_bulk_get() rather than clk_bulk_get_all())
Here is version 2 of this series:
https://lore.kernel.org/lkml/20251013153526.2276556-1-elder@riscstar.com/
Full details of changes made for version 2 are available there.
Alex Elder (7):
dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY
dt-bindings: phy: spacemit: introduce PCIe PHY
dt-bindings: pci: spacemit: introduce PCIe host controller
phy: spacemit: introduce PCIe/combo PHY
PCI: spacemit: introduce SpacemiT PCIe host driver
riscv: dts: spacemit: add a PCIe regulator
riscv: dts: spacemit: PCIe and PHY-related updates
.../bindings/pci/spacemit,k1-pcie-host.yaml | 147 ++++
.../bindings/phy/spacemit,k1-combo-phy.yaml | 114 +++
.../bindings/phy/spacemit,k1-pcie-phy.yaml | 71 ++
.../boot/dts/spacemit/k1-bananapi-f3.dts | 38 +
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 33 +
arch/riscv/boot/dts/spacemit/k1.dtsi | 146 ++++
drivers/pci/controller/dwc/Kconfig | 10 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-spacemit-k1.c | 311 ++++++++
drivers/phy/Kconfig | 11 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-spacemit-k1-pcie.c | 670 ++++++++++++++++++
12 files changed, 1553 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-spacemit-k1.c
create mode 100644 drivers/phy/phy-spacemit-k1-pcie.c
base-commit: 98ac9cc4b4452ed7e714eddc8c90ac4ae5da1a09
--
2.48.1
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