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Message-Id: <20251017203438.744197-1-krishna.kurapati@oss.qualcomm.com>
Date: Sat, 18 Oct 2025 02:04:38 +0530
From: Krishna Kurapati <krishna.kurapati@....qualcomm.com>
To: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Dmitry Baryshkov <lumag@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Krishna Kurapati <krishna.kurapati@....qualcomm.com>
Subject: [PATCH] phy: qcom: qmp-combo: Add polarity inversion support for SAR2130P
On SAR2130P QXR Platform, the CC Lines are inverted and the lane
programming is to be done reverse compared to other targets.
As per the HW specifics, Bit-2 of TYPEC_CTRL register indicates
port select polarity. This bit is to be set for SAR2130P.
Signed-off-by: Krishna Kurapati <krishna.kurapati@....qualcomm.com>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 7b5af30f1d02..813c88f0a16f 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -60,6 +60,7 @@
/* QPHY_V3_DP_COM_TYPEC_CTRL register bits */
#define SW_PORTSELECT_VAL BIT(0)
#define SW_PORTSELECT_MUX BIT(1)
+#define INVERT_CC_POLARITY BIT(2)
#define PHY_INIT_COMPLETE_TIMEOUT 10000
@@ -1820,6 +1821,7 @@ struct qmp_phy_cfg {
/* Offset from PCS to PCS_USB region */
unsigned int pcs_usb_offset;
+ bool invert_cc_polarity;
};
struct qmp_combo {
@@ -2010,6 +2012,7 @@ static const struct qmp_phy_cfg sar2130p_usb3dpphy_cfg = {
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
+ .invert_cc_polarity = true,
};
static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = {
@@ -3046,6 +3049,10 @@ static int qmp_combo_com_init(struct qmp_combo *qmp, bool force)
val = SW_PORTSELECT_MUX;
if (qmp->orientation == TYPEC_ORIENTATION_REVERSE)
val |= SW_PORTSELECT_VAL;
+
+ if (cfg->invert_cc_polarity)
+ val |= INVERT_CC_POLARITY;
+
writel(val, com + QPHY_V3_DP_COM_TYPEC_CTRL);
switch (qmp->qmpphy_mode) {
--
2.34.1
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