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Message-ID: <a4751ca0-8990-4e99-8ecb-e6c2732552eb@intel.com>
Date: Fri, 17 Oct 2025 12:52:24 -0700
From: Sohil Mehta <sohil.mehta@...el.com>
To: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>, "tglx@...utronix.de"
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Subject: Re: [PATCH v10 00/15] x86: Enable Linear Address Space Separation
support
On 10/7/2025 9:23 AM, Edgecombe, Rick P wrote:
> There is also an expected harmless UABI change around SIG_SEGV. For a user mode
> kernel address range access, the kernel can deliver a signal that provides the
> exception type and the address. Before it was #PF, now a #GP with no address.
>
That's right. With LASS, the SIG_SEGV will be delivered with without any
address information to userspace. But these are illegal accesses anyway,
so it probably doesn't matter much. I'll include a note in the patch
that updates the #GP handler.
Thanks Rick, for the review tags and general thoughts on the series.
Apart from the minor change in Patch 5 (regarding CR pinning), I have
mainly gathered improvements to the commit message and code comments.
Is there any other feedback?
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