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Message-ID: <aPNineCsVgUyD6xW@stanley.mountain>
Date: Sat, 18 Oct 2025 12:49:17 +0300
From: Dan Carpenter <dan.carpenter@...aro.org>
To: Anand Moon <linux.amoon@...il.com>
Cc: Vignesh Raghavendra <vigneshr@...com>,
Siddharth Vadapalli <s-vadapalli@...com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
"open list:PCI DRIVER FOR TI DRA7XX/J721E" <linux-omap@...r.kernel.org>,
"open list:PCI DRIVER FOR TI DRA7XX/J721E" <linux-pci@...r.kernel.org>,
"moderated list:PCI DRIVER FOR TI DRA7XX/J721E" <linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 2/3] PCI: j721e: Use devm_clk_get_optional_enabled()
to get the clock
On Tue, Oct 14, 2025 at 05:02:28PM +0530, Anand Moon wrote:
> Use devm_clk_get_optional_enabled() helper instead of calling
> devm_clk_get_optional() and then clk_prepare_enable(). It simplifies
> the error handling and makes the code more compact. This changes removes
> the unnecessary clk variable and assigns the result of the
> devm_clk_get_optional_enabled() call directly to pcie->refclk.
> This makes the code more concise and readable without changing the
> behavior.
>
> Cc: Siddharth Vadapalli <s-vadapalli@...com>
> Signed-off-by: Anand Moon <linux.amoon@...il.com>
> ---
> v1: Drop explicit clk_disable_unprepare — handled by devm_clk_get_optional_enabled
> Since devm_clk_get_optional_enabled internally manages clk_prepare_enable and
> clk_disable_unprepare as part of its lifecycle, the explicit call to
> clk_disable_unprepare is redundant and can be safely removed.
> ---
> drivers/pci/controller/cadence/pci-j721e.c | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
> index 9c7bfa77a66e..ed8e182f0772 100644
> --- a/drivers/pci/controller/cadence/pci-j721e.c
> +++ b/drivers/pci/controller/cadence/pci-j721e.c
> @@ -479,7 +479,6 @@ static int j721e_pcie_probe(struct platform_device *pdev)
> struct cdns_pcie_ep *ep = NULL;
> struct gpio_desc *gpiod;
> void __iomem *base;
> - struct clk *clk;
> u32 num_lanes;
> u32 mode;
> int ret;
> @@ -603,18 +602,11 @@ static int j721e_pcie_probe(struct platform_device *pdev)
> goto err_get_sync;
> }
>
> - clk = devm_clk_get_optional(dev, "pcie_refclk");
> - if (IS_ERR(clk)) {
> - ret = dev_err_probe(dev, PTR_ERR(clk), "failed to get pcie_refclk\n");
> - goto err_pcie_setup;
> - }
> -
> - ret = clk_prepare_enable(clk);
> - if (ret) {
> + pcie->refclk = devm_clk_get_optional_enabled(dev, "pcie_refclk");
> + if (IS_ERR(pcie->refclk)) {
> ret = dev_err_probe(dev, ret, "failed to enable pcie_refclk\n");
This isn't correct. It's assigning ret to itself when it should be
assigning PTR_ERR(pcie->refclk) to ret.
regards,
dan carpenter
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