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Message-ID: <f26601b4-c589-5909-5432-378c496e9010@manjaro.org>
Date: Sun, 19 Oct 2025 19:04:30 +0200
From: "Dragan Simic" <dsimic@...jaro.org>
To: "Grzegorz Sterniczuk" <grzegorz.sterniczuk@...il.com>
Cc: "Tianling Shen" <cnsztl@...il.com>, "Rob Herring" <robh@...nel.org>, "Krzysztof Kozlowski" <krzk+dt@...nel.org>, "Conor Dooley" <conor+dt@...nel.org>, "Heiko Stuebner" <heiko@...ech.de>, "Grzegorz Sterniczuk" <grzegorz@...rnicz.uk>, "Jonas Karlman" <jonas@...boo.se>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: fix eMMC corruption on NanoPC-T6 with A3A444 chips

Hello Grzegorz,

On Sunday, October 19, 2025 12:05 CEST, Grzegorz Sterniczuk <grzegorz.sterniczuk@...il.com> wrote:
> [image: image.png]
> [image: IMG_0471.jpeg]

Nice, thanks for the pictures!  BTW, I'm hoping to get the quirk
patch(es) done and submitted to the MLs in the next few days.  Of
course, I'll Cc your and everyone else's email addresses so you
can perform the required testing and provide Tested-by tags.

> On Fri, 17 Oct 2025 at 12:25, Dragan Simic <dsimic@...jaro.org> wrote:
> > On Friday, October 17, 2025 09:39 CEST, Tianling Shen <cnsztl@...il.com>
> > wrote:
> > > From: Grzegorz Sterniczuk <grzegorz@...rnicz.uk>
> > >
> > > Some NanoPC-T6 boards with A3A444 eMMC chips experience I/O errors and
> > > corruption when using HS400 mode. Downgrade to HS200 mode to ensure
> > > stable operation.
> >
> > Could you, please, provide more details about the troublesome eMMC
> > chip that gets identified as A3A444, i.e. what's the actual brand
> > and model?  Maybe you could send a picture of it?  It might also
> > help if you'd send the contents of "/sys/class/block/mmcblkX/device
> > /manfid" from your board (where "X" should equal two).
> >
> > I'm asking for that because I'd like to research it a bit further,
> > if possible, because some other eMMC chips that are also found on
> > the NanoPc-T6 seem to work fine in HS400 mode. [1]  It may be that
> > the A3A444 chip has some issues with the HS400 mode on its own,
> > i.e. the observed issues may not be caused by the board.
> >
> > [1] https://github.com/openwrt/openwrt/issues/18844
> >
> > > Signed-off-by: Grzegorz Sterniczuk <grzegorz@...rnicz.uk>
> > > Signed-off-by: Tianling Shen <cnsztl@...il.com>
> > > ---
> > >  arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 3 +--
> > >  1 file changed, 1 insertion(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> > b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> > > index fafeabe9adf9..5f63f38f7326 100644
> > > --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> > > +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> > > @@ -717,8 +717,7 @@ &sdhci {
> > >       no-sd;
> > >       non-removable;
> > >       max-frequency = <200000000>;
> > > -     mmc-hs400-1_8v;
> > > -     mmc-hs400-enhanced-strobe;
> > > +     mmc-hs200-1_8v;
> > >       status = "okay";
> > >  };


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