linux-kernel - [PATCH 3/4] arm64: dts: imx8mp-phyboard-pollux: Enable i2c3

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Message-ID: <20251020-imx8mp-dts-additions-v1-3-ea9ac5652b8b@phytec.de>
Date: Mon, 20 Oct 2025 15:11:24 +0200
From: Yannic Moog <y.moog@...tec.de>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, "Sascha
 Hauer" <s.hauer@...gutronix.de>, Pengutronix Kernel Team
	<kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>
CC: <upstream@...ts.phytec.de>, <devicetree@...r.kernel.org>,
	<imx@...ts.linux.dev>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, Stefan Riedmueller <s.riedmueller@...tec.de>,
	Teresa Remmet <t.remmet@...tec.de>, Yannic Moog <y.moog@...tec.de>
Subject: [PATCH 3/4] arm64: dts: imx8mp-phyboard-pollux: Enable i2c3

From: Stefan Riedmueller <s.riedmueller@...tec.de>

On the phyBOARD-Pollux the i2c3 node is used on the CSI1 interface to
connect to imaging sensors. Thus define it so it can be easily enabled if
required.

Signed-off-by: Stefan Riedmueller <s.riedmueller@...tec.de>
Signed-off-by: Teresa Remmet <t.remmet@...tec.de>
Signed-off-by: Yannic Moog <y.moog@...tec.de>
---
 .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts   | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 6203e39bc01be476f16f5ac80b6365bce150ae37..7d34b820e3213a3832c5be47444d4e9c636a6202 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -228,6 +228,15 @@ led-3 {
 	};
 };
 
+&i2c3 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	pinctrl-1 = <&pinctrl_i2c3_gpio>;
+	sda-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+	scl-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+};
+
 &ldb_lvds_ch1 {
 	remote-endpoint = <&panel1_in>;
 };
@@ -442,6 +451,20 @@ MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x1e2
 		>;
 	};
 
+	pinctrl_i2c3: i2c3grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c2
+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c2
+		>;
+	};
+
+	pinctrl_i2c3_gpio: i2c3gpiogrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18	0x1e2
+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19	0x1e2
+		>;
+	};
+
 	pinctrl_lvds1: lvds1grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20		0x12

-- 
2.51.0