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Message-ID: <e6830a20-7c58-4799-ab38-53c1276cccb4@oss.qualcomm.com>
Date: Mon, 20 Oct 2025 06:38:50 -0700
From: Vijay Kumar Tumati <vijay.tumati@....qualcomm.com>
To: Hangxiang Ma <hangxiang.ma@....qualcomm.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Loic Poulain <loic.poulain@....qualcomm.com>,
Robert Foss
<rfoss@...nel.org>, Andi Shyti <andi.shyti@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Todor Tomov <todor.too@...il.com>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>
Cc: linux-i2c@...r.kernel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-media@...r.kernel.org, aiqun.yu@....qualcomm.com,
tingwei.zhang@....qualcomm.com, trilok.soni@....qualcomm.com,
yijie.yang@....qualcomm.com,
Jingyi Wang <jingyi.wang@....qualcomm.com>,
Atiya Kailany <atiya.kailany@....qualcomm.com>
Subject: Re: [PATCH v2 3/6] media: qcom: camss: Add Kaanapali compatible camss
driver
On 10/19/2025 11:45 PM, Hangxiang Ma wrote:
> On 10/16/2025 4:55 PM, Bryan O'Donoghue wrote:
>> On 15/10/2025 03:56, Hangxiang Ma wrote:
>>> +static const struct resources_icc icc_res_kaanapali[] = {
>>> + /* Based on 4096 x 3072 30 FPS 2496 Mbps mode */
>>> + {
>>> + .name = "ahb",
>>> + .icc_bw_tbl.avg = 925857,
>>> + .icc_bw_tbl.peak = 925857,
>>> + },
>>
>> Looking at other implementations I realise we've been adding avg and
>> peak without too much review however, wouldn't 925857 / 2 => 462928
>> be a better value for the average ?
>>
>> ---
>> bod
>
> Ack. Thanks.
Just adding my thoughts on this, as you know the peak/avg bandwidth
should primarily depends on the sensor data rate and additionally, the
average BW vote should depend on the buffer sizes in the NIUs/NOCs and
(although irrelevant here) whether it's an RT or NRT module (file system
reads/writes from the NRT modules can be averaged and controlled
better). Fundamentally, the votes from all modules go into the
calculation of the DDR clock. The current driver does not take into
account anything. So either way, it is not ideal I think. We can discuss
and come up with a cleaner approach in a different patch series covering
all chip sets. Thanks.
>
> ---
> Hangxiang
>
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