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Message-ID: <86ldl5wmry.wl-maz@kernel.org>
Date: Mon, 20 Oct 2025 17:39:13 +0100
From: Marc Zyngier <maz@...nel.org>
To: Ada Couprie Diaz <ada.coupriediaz@....com>
Cc: linux-arm-kernel@...ts.infradead.org,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>,
Ard Biesheuvel <ardb@...nel.org>,
Joey Gouly <joey.gouly@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Zenghui Yu <yuzenghui@...wei.com>,
Andrey Ryabinin <ryabinin.a.a@...il.com>,
Alexander Potapenko <glider@...gle.com>,
Andrey Konovalov <andreyknvl@...il.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
Vincenzo Frascino <vincenzo.frascino@....com>,
linux-kernel@...r.kernel.org,
kvmarm@...ts.linux.dev,
kasan-dev@...glegroups.com,
Mark Rutland <mark.rutland@....com>
Subject: Re: [RFC PATCH 03/16] arm64/insn: always inline aarch64_insn_decode_register()
On Tue, 23 Sep 2025 18:48:50 +0100,
Ada Couprie Diaz <ada.coupriediaz@....com> wrote:
>
> As it is always called with an explicit register type, we can
> check for its validity at compile time and remove the runtime error print.
>
> This makes `aarch64_insn_decode_register()` self-contained and safe
> for inlining and usage from patching callbacks.
>
> Signed-off-by: Ada Couprie Diaz <ada.coupriediaz@....com>
> ---
> arch/arm64/include/asm/insn.h | 32 ++++++++++++++++++++++++++++++--
> arch/arm64/lib/insn.c | 29 -----------------------------
> 2 files changed, 30 insertions(+), 31 deletions(-)
>
> diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
> index 18c7811774d3..f6bce1a62dda 100644
> --- a/arch/arm64/include/asm/insn.h
> +++ b/arch/arm64/include/asm/insn.h
> @@ -7,6 +7,7 @@
> */
> #ifndef __ASM_INSN_H
> #define __ASM_INSN_H
> +#include <linux/bits.h>
> #include <linux/build_bug.h>
> #include <linux/types.h>
>
> @@ -558,8 +559,35 @@ enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
> u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
> u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
> u32 insn, u64 imm);
> -u32 aarch64_insn_decode_register(enum aarch64_insn_register_type type,
> - u32 insn);
> +static __always_inline u32 aarch64_insn_decode_register(
> + enum aarch64_insn_register_type type, u32 insn)
> +{
> + compiletime_assert(type >= AARCH64_INSN_REGTYPE_RT &&
> + type <= AARCH64_INSN_REGTYPE_RS, "unknown register type encoding");
> + int shift;
> +
> + switch (type) {
> + case AARCH64_INSN_REGTYPE_RT:
> + case AARCH64_INSN_REGTYPE_RD:
> + shift = 0;
> + break;
> + case AARCH64_INSN_REGTYPE_RN:
> + shift = 5;
> + break;
> + case AARCH64_INSN_REGTYPE_RT2:
> + case AARCH64_INSN_REGTYPE_RA:
> + shift = 10;
> + break;
> + case AARCH64_INSN_REGTYPE_RM:
> + case AARCH64_INSN_REGTYPE_RS:
> + shift = 16;
> + break;
> + default:
> + return 0;
Could you replace the above compiletime_assert() with something in the
default: case instead (BUILD_BUG_ON() or otherwise)?
I'm a bit concerned that if we add an enum entry in the middle of the
current lot, this code becomes broken without us noticing. It would
also rid us of this "return 0" case, which is pretty brittle.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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