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Message-ID: <a007a272-03e3-40fd-871a-aa315f99697c@tuxon.dev>
Date: Mon, 20 Oct 2025 22:19:47 +0300
From: Claudiu Beznea <claudiu.beznea@...on.dev>
To: Ryan.Wanner@...rochip.com, mturquette@...libre.com, sboyd@...nel.org,
alexandre.belloni@...tlin.com, nicolas.ferre@...rochip.com
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, varshini.rajendran@...rochip.com
Subject: Re: [PATCH v4 26/31] clk: at91: at91sam9x5: switch to parent_hw and
parent_data
Hi, Ryan,
On 9/19/25 00:16, Ryan.Wanner@...rochip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@...on.dev>
>
> Switch AT91SAM9X5 clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
> speed and re-parenting.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...on.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@...rochip.com>
> ---
> drivers/clk/at91/at91sam9x5.c | 108 +++++++++++++++++++---------------
> 1 file changed, 61 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
> index 13331e015dd7..46d5ea2e6417 100644
> --- a/drivers/clk/at91/at91sam9x5.c
> +++ b/drivers/clk/at91/at91sam9x5.c
> @@ -38,9 +38,9 @@ static const struct clk_pll_characteristics plla_characteristics = {
> .out = plla_out,
> };
>
> -static const struct {
> +static struct {
> char *n;
> - char *p;
> + struct clk_hw *parent_hw;
> unsigned long flags;
> u8 id;
> } at91sam9x5_systemck[] = {
> @@ -48,12 +48,12 @@ static const struct {
> * ddrck feeds DDR controller and is enabled by bootloader thus we need
> * to keep it enabled in case there is no Linux consumer for it.
> */
> - { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
> - { .n = "smdck", .p = "smdclk", .id = 4 },
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> + { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
> + { .n = "smdck", .id = 4 },
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> };
>
> static const struct clk_pcr_layout at91sam9x5_pcr_layout = {
> @@ -133,12 +133,13 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
> const struct pck *extra_pcks,
> bool has_lcdck)
> {
> + struct clk_hw *main_rc_hw, *main_osc_hw, *hw;
> struct clk_range range = CLK_RANGE(0, 0);
> const char *slck_name, *mainxtal_name;
> struct pmc_data *at91sam9x5_pmc;
> - const char *parent_names[6];
> + struct clk_parent_data parent_data[6];
> struct regmap *regmap;
> - struct clk_hw *hw;
> + struct clk_hw *smdck_hw, *usbck_hw;
> int i;
> bool bypass;
>
> @@ -162,56 +163,58 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
> if (!at91sam9x5_pmc)
> return;
>
> - hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> - 50000000);
> - if (IS_ERR(hw))
> + main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> + 50000000);
> + if (IS_ERR(main_rc_hw))
> goto err_free;
>
> bypass = of_property_read_bool(np, "atmel,osc-bypass");
>
> - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
> - bypass);
> - if (IS_ERR(hw))
> + main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> + &AT91_CLK_PD_NAME(mainxtal_name), bypass);
> + if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_names[0] = "main_rc_osc";
> - parent_names[1] = "main_osc";
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9x5_pmc->chws[PMC_MAIN] = hw;
>
> - hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
> + hw = at91_clk_register_pll(regmap, "pllack", NULL,
> + &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]), 0,
> &at91rm9200_pll_layout, &plla_characteristics);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
> + hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9x5_pmc->chws[PMC_PLLACK] = hw;
>
> - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
> + hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL,
> + &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]));
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9x5_pmc->chws[PMC_UTMI] = hw;
>
> - parent_names[0] = slck_name;
> - parent_names[1] = "mainck";
> - parent_names[2] = "plladivck";
> - parent_names[3] = "utmick";
> + parent_data[0] = AT91_CLK_PD_NAME(slck_name);
> + parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]);
> + parent_data[2] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
> + parent_data[3] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
> hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
> - parent_names, NULL,
> + NULL, parent_data,
> &at91sam9x5_master_layout,
> &mck_characteristics, &mck_lock);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_master_div(regmap, "masterck_div",
> - "masterck_pres", NULL,
> + hw = at91_clk_register_master_div(regmap, "masterck_div", NULL,
> + &AT91_CLK_PD_HW(hw),
> &at91sam9x5_master_layout,
> &mck_characteristics, &mck_lock,
> CLK_SET_RATE_GATE, 0);
> @@ -220,28 +223,30 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
>
> at91sam9x5_pmc->chws[PMC_MCK] = hw;
>
> - parent_names[0] = "plladivck";
> - parent_names[1] = "utmick";
> - hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
> - if (IS_ERR(hw))
> + parent_data[0] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
> + parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
> + usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
> + if (IS_ERR(usbck_hw))
> goto err_free;
>
> - hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
> - if (IS_ERR(hw))
> + parent_data[0] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
> + parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
No need for these. parent_data[] is already filled from the USB clk
registration.
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