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Message-ID: <20251020074211.8942-14-xiandong.wang@mediatek.com>
Date: Mon, 20 Oct 2025 15:40:26 +0800
From: Xiandong Wang <xiandong.wang@...iatek.com>
To: Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, Yongqiang Niu
<yongqiang.niu@...iatek.com>
CC: <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>,
<sirius.wang@...iatek.com>, <vince-wl.liu@...iatek.com>,
<jh.hsu@...iatek.com>, <Project_Global_Chrome_Upstream_Group@...iatek.com>,
Xiandong Wang <xiandong.wang@...iatek.com>
Subject: [PATCH v1 13/13] soc: mediatek: mutex: add mutex support for MT8189
Add mutex support for the main and external displays in MT8189:
- Introduce a new DVO1 output component for the new mutex
settings of MT8189.
- Add a need_sof_mof flag to configure both SOF and MOD settings
for the output component.
Signed-off-by: Xiandong Wang <xiandong.wang@...iatek.com>
---
drivers/soc/mediatek/mtk-mutex.c | 88 ++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index c48983d8a6cd..743c4b93a39e 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -177,6 +177,48 @@
#define MT8188_MUTEX_MOD_DISP1_DPI1 38
#define MT8188_MUTEX_MOD_DISP1_DP_INTF1 39
+#define MT8189_DISP_MUTEX0_MOD0 0x30
+#define MT8189_DISP_MUTEX0_MOD1 0x34
+#define MT8189_DISP_MUTEX0_SOF 0x2C
+#define MT8189_MUTEX_MOD_DISP_OVL0 0
+#define MT8189_MUTEX_MOD_DISP_OVL1 1
+#define MT8189_MUTEX_MOD_DISP_RSZ0 2
+#define MT8189_MUTEX_MOD_DISP_RSZ1 3
+#define MT8189_MUTEX_MOD_DISP_RDMA0 4
+#define MT8189_MUTEX_MOD_DISP_RDMA1 5
+#define MT8189_MUTEX_MOD_DISP_COLOR0 6
+#define MT8189_MUTEX_MOD_DISP_COLOR1 4
+#define MT8189_MUTEX_MOD_DISP_CCORR0 8
+#define MT8189_MUTEX_MOD_DISP_CCORR1 9
+#define MT8189_MUTEX_MOD_DISP_CCORR2 10
+#define MT8189_MUTEX_MOD_DISP_CCORR3 11
+#define MT8189_MUTEX_MOD_DISP_AAL0 12
+#define MT8189_MUTEX_MOD_DISP_AAL1 13
+#define MT8189_MUTEX_MOD_DISP_GAMMA0 14
+#define MT8189_MUTEX_MOD_DISP_GAMMA1 15
+#define MT8189_MUTEX_MOD_DISP_DITHER0 16
+#define MT8189_MUTEX_MOD_DISP_DITHER1 17
+#define MT8189_MUTEX_MOD_DISP_VPP_MERGE0 18
+#define MT8189_MUTEX_MOD_DISP_DSC_WRAP0_CORE0 19
+#define MT8189_MUTEX_MOD_DISP_DSC_WRAP0_CORE1 20
+#define MT8189_MUTEX_MOD_DISP_DVO0 21
+#define MT8189_MUTEX_MOD_DISP_DSI0 22
+#define MT8189_MUTEX_MOD_DISP_DVO1 23
+#define MT8189_MUTEX_MOD_DISP_DPI0 24
+#define MT8189_MUTEX_MOD_DISP_WDMA0 25
+#define MT8189_MUTEX_MOD_DISP_WDMA1 26
+#define MT8189_MUTEX_MOD_DISP_PWM0 27
+#define MT8189_MUTEX_MOD_DISP_PWM1 28
+#define MT8189_MUTEX_MOD_ALL 0xff
+
+#define MT8189_MUTEX_SOF_SINGLE_MODE 0
+#define MT8189_MUTEX_SOF_DSI0 1
+#define MT8189_MUTEX_EOF_DSI0 (MT8189_MUTEX_SOF_DSI0 << 7)
+#define MT8189_MUTEX_SOF_DVO 5
+#define MT8189_MUTEX_EOF_DVO (MT8189_MUTEX_SOF_DVO << 7)
+#define MT8189_MUTEX_SOF_DPTX 6
+#define MT8189_MUTEX_EOF_DPTX (MT8189_MUTEX_SOF_DPTX << 7)
+
#define MT8195_MUTEX_MOD_DISP_OVL0 0
#define MT8195_MUTEX_MOD_DISP_WDMA0 1
#define MT8195_MUTEX_MOD_DISP_RDMA0 2
@@ -554,6 +596,34 @@ static const u8 mt8188_mdp_mutex_table_mod[MUTEX_MOD_IDX_MAX] = {
[MUTEX_MOD_IDX_MDP_WROT3] = MT8195_MUTEX_MOD_MDP_WROT3,
};
+static const unsigned int mt8189_mutex_mod[DDP_COMPONENT_ID_MAX] = {
+ [DDP_COMPONENT_OVL0] = MT8189_MUTEX_MOD_DISP_OVL0,
+ [DDP_COMPONENT_OVL1] = MT8189_MUTEX_MOD_DISP_OVL1,
+ [DDP_COMPONENT_RSZ0] = MT8189_MUTEX_MOD_DISP_RSZ0,
+ [DDP_COMPONENT_RSZ1] = MT8189_MUTEX_MOD_DISP_RSZ1,
+ [DDP_COMPONENT_RDMA0] = MT8189_MUTEX_MOD_DISP_RDMA0,
+ [DDP_COMPONENT_RDMA1] = MT8189_MUTEX_MOD_DISP_RDMA1,
+ [DDP_COMPONENT_COLOR0] = MT8189_MUTEX_MOD_DISP_COLOR0,
+ [DDP_COMPONENT_COLOR1] = MT8189_MUTEX_MOD_DISP_COLOR1,
+ [DDP_COMPONENT_CCORR0] = MT8189_MUTEX_MOD_DISP_CCORR0,
+ [DDP_COMPONENT_CCORR1] = MT8189_MUTEX_MOD_DISP_CCORR1,
+ [DDP_COMPONENT_AAL0] = MT8189_MUTEX_MOD_DISP_AAL0,
+ [DDP_COMPONENT_AAL1] = MT8189_MUTEX_MOD_DISP_AAL1,
+ [DDP_COMPONENT_GAMMA] = MT8189_MUTEX_MOD_DISP_GAMMA0,
+ [DDP_COMPONENT_DITHER0] = MT8189_MUTEX_MOD_DISP_DITHER0,
+ [DDP_COMPONENT_DITHER1] = MT8189_MUTEX_MOD_DISP_DITHER1,
+ [DDP_COMPONENT_MERGE0] = MT8189_MUTEX_MOD_DISP_VPP_MERGE0,
+ [DDP_COMPONENT_DSC0] = MT8189_MUTEX_MOD_DISP_DSC_WRAP0_CORE0,
+ [DDP_COMPONENT_DVO0] = MT8189_MUTEX_MOD_DISP_DVO0,
+ [DDP_COMPONENT_DVO1] = MT8189_MUTEX_MOD_DISP_DVO1,
+ [DDP_COMPONENT_DSI0] = MT8189_MUTEX_MOD_DISP_DSI0,
+ [DDP_COMPONENT_WDMA0] = MT8189_MUTEX_MOD_DISP_WDMA0,
+ [DDP_COMPONENT_PWM0] = MT8189_MUTEX_MOD_DISP_PWM0,
+ [DDP_COMPONENT_COMP0_OUT_CB4] = MT8189_MUTEX_MOD_ALL,
+ [DDP_COMPONENT_COMP0_OUT_CB5] = MT8189_MUTEX_MOD_ALL,
+ [MT8189_MUTEX_MOD_DISP_PWM1] = MT8189_MUTEX_MOD_DISP_PWM1,
+};
+
static const u8 mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {
[DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,
[DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,
@@ -718,6 +788,14 @@ static const u16 mt8188_mutex_sof[DDP_MUTEX_SOF_MAX] = {
MT8188_MUTEX_SOF_DP_INTF1 | MT8188_MUTEX_EOF_DP_INTF1,
};
+static const unsigned int mt8189_mutex_sof[DDP_MUTEX_SOF_MAX] = {
+ [MUTEX_SOF_SINGLE_MODE] = MT8189_MUTEX_SOF_SINGLE_MODE,
+ [MUTEX_SOF_DSI0] =
+ MT8189_MUTEX_SOF_DSI0 | MT8189_MUTEX_EOF_DSI0,
+ [MUTEX_SOF_DP_INTF0] =
+ MT8189_MUTEX_SOF_DPTX | MT8189_MUTEX_EOF_DPTX,
+};
+
static const u16 mt8195_mutex_sof[DDP_MUTEX_SOF_MAX] = {
[MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
[MUTEX_SOF_DSI0] = MT8195_MUTEX_SOF_DSI0 | MT8195_MUTEX_EOF_DSI0,
@@ -812,6 +890,14 @@ static const struct mtk_mutex_data mt8188_vpp_mutex_driver_data = {
.mutex_table_mod = mt8188_mdp_mutex_table_mod,
};
+static const struct mtk_mutex_data mt8189_mutex_driver_data = {
+ .mutex_mod = mt8189_mutex_mod,
+ .mutex_sof = mt8189_mutex_sof,
+ .mutex_mod_reg = MT8189_DISP_MUTEX0_MOD0,
+ .mutex_sof_reg = MT8189_DISP_MUTEX0_SOF,
+ .need_sof_mod = true,
+};
+
static const struct mtk_mutex_data mt8192_mutex_driver_data = {
.mutex_mod = mt8192_mutex_mod,
.mutex_sof = mt8183_mutex_sof,
@@ -903,6 +989,7 @@ static int mtk_mutex_get_output_comp_sof(enum mtk_ddp_comp_id id)
case DDP_COMPONENT_DPI1:
return MUTEX_SOF_DPI1;
case DDP_COMPONENT_DP_INTF0:
+ case DDP_COMPONENT_DVO1:
return MUTEX_SOF_DP_INTF0;
case DDP_COMPONENT_DP_INTF1:
return MUTEX_SOF_DP_INTF1;
@@ -1182,6 +1269,7 @@ static const struct of_device_id mutex_driver_dt_match[] = {
{ .compatible = "mediatek,mt8186-mdp3-mutex", .data = &mt8186_mdp_mutex_driver_data },
{ .compatible = "mediatek,mt8188-disp-mutex", .data = &mt8188_mutex_driver_data },
{ .compatible = "mediatek,mt8188-vpp-mutex", .data = &mt8188_vpp_mutex_driver_data },
+ { .compatible = "mediatek,mt8189-disp-mutex", .data = &mt8189_mutex_driver_data },
{ .compatible = "mediatek,mt8192-disp-mutex", .data = &mt8192_mutex_driver_data },
{ .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data },
{ .compatible = "mediatek,mt8195-vpp-mutex", .data = &mt8195_vpp_mutex_driver_data },
--
2.46.0
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