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Message-ID: <698d4715-2727-4353-9abf-637bcab56494@collabora.com>
Date: Mon, 20 Oct 2025 12:49:35 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Xiandong Wang <xiandong.wang@...iatek.com>,
Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
Yongqiang Niu <yongqiang.niu@...iatek.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
sirius.wang@...iatek.com, vince-wl.liu@...iatek.com, jh.hsu@...iatek.com,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v1 11/13] soc: mediatek: add mmsys support for MT8189
Il 20/10/25 09:40, Xiandong Wang ha scritto:
> Add driver data for MT8189 and add the routing table for each mmsys.
>
> Signed-off-by: Xiandong Wang <xiandong.wang@...iatek.com>
> ---
> drivers/soc/mediatek/mt8189-mmsys.h | 300 +++++++++++++++++++++++++
> drivers/soc/mediatek/mtk-mmsys.c | 12 +
> include/linux/soc/mediatek/mtk-mmsys.h | 5 +
> 3 files changed, 317 insertions(+)
> create mode 100644 drivers/soc/mediatek/mt8189-mmsys.h
>
> diff --git a/drivers/soc/mediatek/mt8189-mmsys.h b/drivers/soc/mediatek/mt8189-mmsys.h
> new file mode 100644
> index 000000000000..31378b6ee100
> --- /dev/null
> +++ b/drivers/soc/mediatek/mt8189-mmsys.h
> @@ -0,0 +1,300 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2024 MediaTek Inc.
> + */
> +
> +#ifndef __SOC_MEDIATEK_MT8189_MMSYS_H
> +#define __SOC_MEDIATEK_MT8189_MMSYS_H
> +
> +#include <linux/soc/mediatek/mtk-mmsys.h>
> +
> +#define MT8189_MMSYS_SW0_RST_B 0x190
> +
> +#define MT8189_MMSYS_GCE_EVENT_SEL 0x308
> +#define MT8189_EVENT_GCE_EN (BIT(0) | BIT(1))
> +
> +#define MT8189_DISP_OVL0_OUT0_MOUT_EN 0xc10
> + #define MT8189_MOUT_DISP_OVL0_TO_DISP_RSZ0 BIT(0)
two spaces are fine instead of a tab, makes things (just a little) more readable.
#define MT8189_DISP_OVL0_OUT0_MOUT_EN 0xc10
#define MT8189_MOUT_DISP_OVL0_TO_DISP_RSZ0 BIT(0)
> + #define MT8189_MOUT_DISP_OVL0_TO_DISP_RDMA0 BIT(1)
> + #define MT8189_MOUT_DISP_OVL0_TO_DISP_WDMA0 BIT(2)
> +
> +#define MT8189_DISP_OVL1_OUT0_MOUT_EN 0xc14
> + #define MT8189_MOUT_DISP_OVL1_TO_DISP_RSZ1 BIT(0)
> + #define MT8189_MOUT_DISP_OVL1_TO_DISP_RDMA1 BIT(1)
> + #define MT8189_MOUT_DISP_OVL1_TO_DISP_WDMA1 BIT(2)
> +#define MT8189_DISP_OVL_OUT0_MOUT_MASK 0x7
> +
..snip..
> +
> +#define MT8189_OVL_PQ_OUT_CROSSBAR0_SEL_IN 0xc8c
> + #define MT8189_SEL_IN_OVL_PQ_OUT_CROSSBAR0_FROM_DISP_DITER0 (0)
Parenthesis are not needed on those numbers. Please drop ( ).
> + #define MT8189_SEL_IN_OVL_PQ_OUT_CROSSBAR0_FROM_DISP_RDMA0_RSZ0_SOUT (1)
> + #define MT8189_SEL_IN_OVL_PQ_OUT_CROSSBAR0_FROM_DISP_OVL0_OUT0_MOUT (2)
> + #define MT8189_SEL_IN_OVL_PQ_OUT_CROSSBAR0_FROM_DISP_DITER1 (3)
> + #define MT8189_SEL_IN_OVL_PQ_OUT_CROSSBAR0_FROM_DISP_RDMA1_RSZ1_SOUT (4)
> + #define MT8189_SEL_IN_OVL_PQ_OUT_CROSSBAR0_FROM_DISP_OVL1_OUT0_MOUT (5)
> +
Regards,
Angelo
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