[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <26f1b9ef-2e90-476c-8f95-6bae08f69eb1@gmail.com>
Date: Mon, 20 Oct 2025 03:57:46 -0700
From: Laurentiu Mihalcea <laurentiumihalcea111@...il.com>
To: Frank Li <Frank.li@....com>
Cc: Abel Vesa <abelvesa@...nel.org>, Peng Fan <peng.fan@....com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Fabio Estevam <festevam@...il.com>, Philipp Zabel <p.zabel@...gutronix.de>,
Daniel Baluta <daniel.baluta@....com>, Shengjiu Wang
<shengjiu.wang@....com>, linux-clk@...r.kernel.org, imx@...ts.linux.dev,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH v2 1/8] reset: imx8mp-audiomix: Fix bad mask values
On 10/17/2025 7:28 AM, Frank Li wrote:
> On Fri, Oct 17, 2025 at 04:20:18AM -0700, Laurentiu Mihalcea wrote:
>> From: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
>>
>> As per the i.MX8MP TRM, section 14.2 "AUDIO_BLK_CTRL", table 14.2.3.1.1
>> "memory map", the definition of the EARC control register shows that the
>> EARC controller software reset is controlled via bit 0, while the EARC PHY
>> software reset is controlled via bit 1.
>>
>> This means that the current definitions of IMX8MP_AUDIOMIX_EARC_RESET_MASK
>> and IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK are wrong since their values would
>> imply that the EARC controller software reset is controlled via bit 1 and
>> the EARC PHY software reset is controlled via bit 2. Fix them.
>>
>> Fixes: a83bc87cd30a ("reset: imx8mp-audiomix: Prepare the code for more reset bits")
>> Cc: stable@...r.kernel.org
>> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
> Just curious, why previous version can work?
good question. I assume this was never tested so I don't think the question
of this working in previous versions or not is applicable here. I also looked for
the usages of these macros in the DTS and there seems to be no consumer.
I discovered the issue while testing the patches from this series. As for testing,
I used a dummy consumer driver/node and manually checked the register values
after each reset assert/de-assert operation.
>
> Reviewed-by: Frank Li <Frank.Li@....com>
>> ---
>> drivers/reset/reset-imx8mp-audiomix.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/reset/reset-imx8mp-audiomix.c b/drivers/reset/reset-imx8mp-audiomix.c
>> index 6b357adfe646..eceb37ff5dc5 100644
>> --- a/drivers/reset/reset-imx8mp-audiomix.c
>> +++ b/drivers/reset/reset-imx8mp-audiomix.c
>> @@ -14,8 +14,8 @@
>> #include <linux/reset-controller.h>
>>
>> #define IMX8MP_AUDIOMIX_EARC_RESET_OFFSET 0x200
>> -#define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(1)
>> -#define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(2)
>> +#define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(0)
>> +#define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(1)
>>
>> #define IMX8MP_AUDIOMIX_DSP_RUNSTALL_OFFSET 0x108
>> #define IMX8MP_AUDIOMIX_DSP_RUNSTALL_MASK BIT(5)
>> --
>> 2.43.0
>>
Powered by blists - more mailing lists