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Message-ID: <aPYodR5N89vRUyQp@makrotopia.org>
Date: Mon, 20 Oct 2025 13:17:57 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: Sjoerd Simons <sjoerd@...labora.com>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Ryder Lee <ryder.lee@...iatek.com>,
	Jianjun Wang <jianjun.wang@...iatek.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof WilczyƄski <kwilczynski@...nel.org>,
	Manivannan Sadhasivam <mani@...nel.org>,
	Chunfeng Yun <chunfeng.yun@...iatek.com>,
	Vinod Koul <vkoul@...nel.org>,
	Kishon Vijay Abraham I <kishon@...nel.org>,
	Lee Jones <lee@...nel.org>, Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Lorenzo Bianconi <lorenzo@...nel.org>, Felix Fietkau <nbd@....name>,
	kernel@...labora.com, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org, linux-pci@...r.kernel.org,
	linux-phy@...ts.infradead.org, netdev@...r.kernel.org,
	Bryan Hinton <bryan@...anhinton.com>
Subject: Re: [PATCH 10/15] arm64: dts: mediatek: mt7981b: Add Ethernet and
 WiFi offload support

On Mon, Oct 20, 2025 at 12:27:53PM +0200, AngeloGioacchino Del Regno wrote:
> Il 16/10/25 18:47, Daniel Golle ha scritto:
> > On Thu, Oct 16, 2025 at 12:08:46PM +0200, Sjoerd Simons wrote:
> > > Add device tree nodes for the Ethernet subsystem on MT7981B SoC,
> > > including:
> > > - Ethernet MAC controller with dual GMAC support
> > > - Wireless Ethernet Dispatch (WED)
> > > - SGMII PHY controllers for high-speed Ethernet interfaces
> > > - Reserved memory regions for WiFi offload processor
> > > 
> > > Signed-off-by: Sjoerd Simons <sjoerd@...labora.com>
> > > ---
> > >   arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 133 ++++++++++++++++++++++++++++++
> > >   1 file changed, 133 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> > > index 13950fe6e8766..c85fa0ddf2da8 100644
> > > --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> > > +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> 
> ..snip..
> 
> > > +
> > > +			mdio_bus: mdio-bus {
> > > +				#address-cells = <1>;
> > > +				#size-cells = <0>;
> > > +
> > > +				int_gbe_phy: ethernet-phy@0 {
> > > +					compatible = "ethernet-phy-ieee802.3-c22";
> > > +					reg = <0>;
> > > +					phy-mode = "gmii";
> > > +					phy-is-integrated;
> > > +					nvmem-cells = <&phy_calibration>;
> > > +					nvmem-cell-names = "phy-cal-data";
> > 
> > Please also define the two LEDs here with their corresponding (only)
> > pinctrl options for each of them, with 'status = "disabled";'. This
> > makes it easier for boards to make use of the Ethernet PHY leds by just
> > referencing the LED and setting the status to 'okay'.
> > 
> 
> Sorry Daniel, definitely no. The LEDs really are board specific.
> 
> Try to convince me otherwise, but for this one I really doubt that you can.

You are right, the LEDs themselves are board-specific and may not even
be present.

However, the LED controller is always present because it is part of the
PHY which is built-into the SoC. And the pinctrl property which I'd like
to see described on SoC-level is a property of the LED controller rather
than the LED itself. Sadly the device tree node doesn't make the
distinction between LED and LED controller, so I understand you your
argument as well.

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