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Message-ID: <20251021164444.GB699957@nvidia.com>
Date: Tue, 21 Oct 2025 13:44:44 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: "Liam R. Howlett" <Liam.Howlett@...cle.com>, ankita@...dia.com,
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Subject: Re: [PATCH v3 0/3] mm: Implement ECC handling for pfn with no struct
page
On Tue, Oct 21, 2025 at 12:30:48PM -0400, Liam R. Howlett wrote:
> > enables VM_PFNMAP vmas to map at PMD level. Otherwise, a poison to a PFN
> > would need breaking the PMD mapping into PTEs to unmap only the poisoned
> > PFN. This can have a major performance impact.
>
> Is the performance impact really a concern in the event of failed
> memory?
Yes, something like the KVM S2 is very sensitive to page size for TLB
performace.
> Does this happen enough to warrant this special case?
If you have a 100k sized cluster it happens constantly :\
> Surely it's not failing hardware that may cause performance impacts, so
> is this triggered in some other way that I'm missing or a conversation
> pointer?
It is the splitting of a pgd/pmd level into PTEs that gets mirrored
into the S2 and then greatly increases the cost of table walks inside
a guest. The HW caches are sized for 1G S2 PTEs, not 4k.
Jason
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