linux-kernel - [PATCH 0/4] Add versaclock3 support for RZ/V2H EVK

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <20251021175311.19611-1-ovidiu.panait.rb@renesas.com>
Date: Tue, 21 Oct 2025 17:53:07 +0000
From: Ovidiu Panait <ovidiu.panait.rb@...esas.com>
To: biju.das.jz@...renesas.com,
	geert+renesas@...der.be,
	magnus.damm@...il.com,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	mturquette@...libre.com,
	sboyd@...nel.org
Cc: linux-renesas-soc@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-clk@...r.kernel.org
Subject: [PATCH 0/4] Add versaclock3 support for RZ/V2H EVK

Hi,

This series extends the versaclock3 driver to support the internal
freerunning 32.768 kHz clock, which is used on the RZ/V2H SoC as RTC
counter clock. It also adds the dts node for the RZ/V2H EVK.

Best regards,
Ovidiu

Ovidiu Panait (4):
  clk: versaclock3: Remove unused SE2 clock select macro
  clk: versaclock3: Use clk_parent_data arrays for clk_mux
  clk: versaclock3: Add freerunning 32.768kHz clock support
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add versa3 clock
    generator node

 .../dts/renesas/r9a09g057h44-rzv2h-evk.dts    |  25 ++++
 drivers/clk/clk-versaclock3.c                 | 126 +++++++++++++-----
 2 files changed, 120 insertions(+), 31 deletions(-)

-- 
2.51.0