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Message-ID: <20251021184502.GD19043@pendragon.ideasonboard.com>
Date: Tue, 21 Oct 2025 21:45:02 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Geert Uytterhoeven <geert@...ux-m68k.org>,
Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Biju Das <biju.das.jz@...renesas.com>,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <rfoss@...nel.org>, Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v11 0/7] Add support for DU/DSI clocks and DSI driver
support for the Renesas RZ/V2H(P) SoC
On Tue, Oct 21, 2025 at 07:26:49PM +0100, Lad, Prabhakar wrote:
> On Tue, Oct 21, 2025 at 11:26 AM Geert Uytterhoeven wrote:
> >
> > Hi Prabhakar et al,
> >
> > On Wed, 15 Oct 2025 at 21:26, Prabhakar <prabhakar.csengg@...il.com> wrote:
> > > This patch series adds DU/DSI clocks and provides support for the
> > > MIPI DSI interface on the RZ/V2H(P) SoC.
> > >
> > > v10->v11:
> > > - Split CPG_PLL_CLK1_K/M/PDIV macro change into separate patch
> > > - Updated rzv2h_cpg_plldsi_div_determine_rate()
> > > while iterating over the divider table
> > > - Added Acked-by tag from Tomi for patch 2/7 and 3/7
> > > - Added Reviewed-by tag from Geert for patch 2/7 and 3/7
> >
> > I think this series is ready for merging.
>
> \o/
>
> > > Lad Prabhakar (7):
> > > clk: renesas: rzv2h-cpg: Add instance field to struct pll
> > > clk: renesas: rzv2h-cpg: Use GENMASK for PLL fields
> > > clk: renesas: rzv2h-cpg: Add support for DSI clocks
> > > clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC
> > > dt-bindings: display: bridge: renesas,dsi: Document RZ/V2H(P) and
> > > RZ/V2N
> > > drm: renesas: rz-du: mipi_dsi: Add LPCLK clock support
> > > drm: renesas: rz-du: mipi_dsi: Add support for RZ/V2H(P) SoC
> >
> > As this touches both clk and drm, let's discuss the merge strategy.
> > My proposal:
> > 1. I queue patches 1-3 in an immutable branch with a signed tag,
> > to be used as a base for the remaining patches,
> > 2. I queue patch 4 on top of 1 in renesas-clk for v6.19,
> > 3. The DRM people queue patches 5-7 on top of 1.
> >
> > Does that sound fine for you?
> Sounds good to me.
>
> Biju/Tomi, are you OK with the above?
The plan seems good to me. Note that you won't be able to push this
yourself to drm-misc as committers are limited to pushing linear
branches. We need an ack from the drm-misc maintainers, and one of them
will need to merge the branch (either branch 1. as prepared by Geert, on
top of which you can them push patches 5-7 yourself, or a branch you'll
prepare on top of 1. with patches 5-7).
--
Regards,
Laurent Pinchart
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