linux-kernel - [PATCH 2/2] MIPS: Malta: Fix PCI southbridge legacy resource reservations

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Message-ID: <alpine.DEB.2.21.2510212001250.8377@angie.orcam.me.uk>
Date: Tue, 21 Oct 2025 20:38:29 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Bjorn Helgaas <helgaas@...nel.org>, 
    Thomas Bogendoerfer <tsbogend@...ha.franken.de>
cc: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>, 
    Bjorn Helgaas <bhelgaas@...gle.com>, linux-mips@...r.kernel.org, 
    linux-kernel@...r.kernel.org
Subject: [PATCH 2/2] MIPS: Malta: Fix PCI southbridge legacy resource
 reservations

Covering the PCI southbridge legacy port I/O range with a northbridge 
resource reservation prevents MIPS Malta platform code from claiming its 
standard legacy resources.  This is because request_resource() calls 
cause a clash with the previous reservation and consequently fail.

Change to using insert_resource() so as to prevent the clash, switching 
the legacy reservations from:

00000000-00ffffff : MSC PCI I/O
  00000020-00000021 : pic1
  00000070-00000077 : rtc0
  000000a0-000000a1 : pic2
  [...]

to:

00000000-00ffffff : MSC PCI I/O
  00000000-0000001f : dma1
  00000020-00000021 : pic1
  00000040-0000005f : timer
  00000060-0000006f : keyboard
  00000070-00000077 : rtc0
  00000080-0000008f : dma page reg
  000000a0-000000a1 : pic2
  000000c0-000000df : dma2
  [...]

Signed-off-by: Maciej W. Rozycki <macro@...am.me.uk>
Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
Cc: stable@...r.kernel.org # v6.18+
---
 arch/mips/mti-malta/malta-setup.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

linux-mips-malta-setup-insert-resource.diff
Index: linux-macro/arch/mips/mti-malta/malta-setup.c
===================================================================
--- linux-macro.orig/arch/mips/mti-malta/malta-setup.c
+++ linux-macro/arch/mips/mti-malta/malta-setup.c
@@ -213,7 +213,7 @@ void __init plat_mem_setup(void)
 
 	/* Request I/O space for devices used on the Malta board. */
 	for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
-		request_resource(&ioport_resource, standard_io_resources+i);
+		insert_resource(&ioport_resource, standard_io_resources + i);
 
 	/*
 	 * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.