[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <79EDC9D1-5C29-4A9B-A615-304DCA37BE03@amazon.com>
Date: Tue, 21 Oct 2025 21:35:59 +0000
From: "Bandi, Ravi Kumar" <ravib@...zon.com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: "mani@...nel.org" <mani@...nel.org>, "thippeswamy.havalige@....com"
<thippeswamy.havalige@....com>, "lpieralisi@...nel.org"
<lpieralisi@...nel.org>, "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"kwilczynski@...nel.org" <kwilczynski@...nel.org>, "robh@...nel.org"
<robh@...nel.org>, "michal.simek@....com" <michal.simek@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "stable@...r.kernel.org"
<stable@...r.kernel.org>, Stefan Roese <stefan.roese@...lbox.org>, "Sean
Anderson" <sean.anderson@...ux.dev>
Subject: Re: [PATCH v2] PCI: xilinx-xdma: Enable INTx interrupts
> On Oct 21, 2025, at 2:28 PM, Bjorn Helgaas <helgaas@...nel.org> wrote:
>
> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you can confirm the sender and know the content is safe.
>
>
>
> On Tue, Oct 21, 2025 at 08:55:41PM +0000, Bandi, Ravi Kumar wrote:
>>> On Tue, Oct 21, 2025 at 05:46:17PM +0000, Bandi, Ravi Kumar wrote:
>>>>> On Oct 21, 2025, at 10:23 AM, Bjorn Helgaas <helgaas@...nel.org> wrote:
>>>>> On Sat, Sep 20, 2025 at 10:52:32PM +0000, Ravi Kumar Bandi wrote:
>>>>>> The pcie-xilinx-dma-pl driver does not enable INTx interrupts
>>>>>> after initializing the port, preventing INTx interrupts from
>>>>>> PCIe endpoints from flowing through the Xilinx XDMA root port
>>>>>> bridge. This issue affects kernel 6.6.0 and later versions.
>>>>>>
>>>>>> This patch allows INTx interrupts generated by PCIe endpoints
>>>>>> to flow through the root port. Tested the fix on a board with
>>>>>> two endpoints generating INTx interrupts. Interrupts are
>>>>>> properly detected and serviced. The /proc/interrupts output
>>>>>> shows:
>>>>>>
>>>>>> [...]
>>>>>> 32: 320 0 pl_dma:RC-Event 16 Level 400000000.axi-pcie, azdrv
>>>>>> 52: 470 0 pl_dma:RC-Event 16 Level 500000000.axi-pcie, azdrv
>>>>>> [...]
>>>>>>
>>>>>> Changes since v1::
>>>>>> - Fixed commit message per reviewer's comments
>>>>>>
>>>>>> Fixes: 8d786149d78c ("PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver")
>>>>>> Cc: stable@...r.kernel.org
>>>>>> Signed-off-by: Ravi Kumar Bandi <ravib@...zon.com>
>>>>>
>>>>> Hi Ravi, obviously you tested this, but I don't know how to reconcile
>>>>> this with Stefan's INTx fix at
>>>>> https://lore.kernel.org/r/20251021154322.973640-1-stefan.roese@mailbox.org
>>>>>
>>>>> Does Stefan's fix need to be squashed into this patch?
>>>>
>>>> Sure, we can squash Stefan’s fix into this.
>>>
>>> I know we *can* squash them.
>>>
>>> I want to know why things worked for you and Stefan when they
>>> *weren't* squashed:
>>>
>>> - Why did INTx work for you even without Stefan's patch. Did you
>>> get INTx interrupts but not the right ones, e.g., did the device
>>> signal INTA but it was received as INTB?
>>
>> I saw that interrupts were being generated by the endpoint device,
>> but I didn’t specifically check if they were correctly translated in
>> the controller. I noticed that the new driver wasn't explicitly
>> enabling the interrupts, so my first approach was to enable them,
>> which helped the interrupts flow through.
>
> OK, I'll assume the interrupts happened but the driver might not have
> been able to handle them correctly, e.g., it was prepared for INTA but
> got INTB or similar.
>
>>> - Why did Stefan's patch work for him even without your patch. How
>>> could Stefan's INTx work without the CSR writes to enable
>>> interrupts?
>>
>> I'm not entirely sure if there are any other dependencies in the
>> FPGA bitstream. I'll investigate further and get back to you.
>
> Stefan clarified in a private message that he had applied your patch
> first, so this mystery is solved.
Thanks for confirming.
>
>>> - Why you mentioned "kernel 6.6.0 and later versions."
>>> 8d786149d78c appeared in v6.7, so why would v6.6.0 would be
>>> affected?
>>
>> Apologies for not clearly mentioning the version earlier. This is
>> from the linux-xlnx tree on the xlnx_rebase_v6.6 branch, which
>> includes the new Xilinx root port driver with QDMA support:
>> https://github.com/Xilinx/linux-xlnx/blob/xlnx_rebase_v6.6_LTS/drivers/pci/controller/pcie-xilinx-dma-pl.c
>>
>> In earlier versions, the driver was:
>> https://github.com/Xilinx/linux-xlnx/blob/xlnx_rebase_v6.1_LTS_2023.1_update/drivers/pci/controller/pcie-xdma-pl.c
>> This older driver had no issues with interrupts.
>>
>> The new driver introduced in v6.7 and later is a rewrite of the old
>> one, now with QDMA support, which has issues with INTx interrupts.
>
> OK, this sounds like out-of-tree history that is not relevant in the
> mainline kernel, so Mani did the right thing in omitting it.
>
> I think the best thing to do is to squash Stefan's patch into this one
> so we end up with a single patch that makes INTx work correctly.
>
> Ravi and Stefan, does that seem OK to you?
Sure, I’m OK, thank you.
>
>>>>>> +++ b/drivers/pci/controller/pcie-xilinx-dma-pl.c
>>>>>> @@ -659,6 +659,12 @@ static int xilinx_pl_dma_pcie_setup_irq(struct pl_dma_pcie *port)
>>>>>> return err;
>>>>>> }
>>>>>>
>>>>>> + /* Enable interrupts */
>>>>>> + pcie_write(port, XILINX_PCIE_DMA_IMR_ALL_MASK,
>>>>>> + XILINX_PCIE_DMA_REG_IMR);
>>>>>> + pcie_write(port, XILINX_PCIE_DMA_IDRN_MASK,
>>>>>> + XILINX_PCIE_DMA_REG_IDRN_MASK);
>>>>>> +
>>>>>> return 0;
>>>>>> }
>>
Powered by blists - more mailing lists