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Message-ID: <CACRpkdaqXzogkbcnR3uaDeGFcVtwmUq5DbETSqzjVQECJROF7g@mail.gmail.com>
Date: Tue, 21 Oct 2025 09:18:50 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Sander Vanheule <sander@...nheule.net>
Cc: Michael Walle <mwalle@...nel.org>, Bartosz Golaszewski <brgl@...ev.pl>, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH 2/2] gpio: regmap: Bypass cache for aliased outputs
On Mon, Oct 20, 2025 at 1:56 PM Sander Vanheule <sander@...nheule.net> wrote:
> GPIO chips often have data input and output registers aliased to the
> same offset. The output register is non-valitile and could in theory be
> cached. The input register however is volatile by nature and hence
> should not be cached, resulting in different requirements for reads and
> writes.
>
> The generic gpiochip implementation stores a shadow value of the pin
> output data, which is updated and written to hardware on output data
> changes. Pin input values are always obtained by reading the aliased
> data register from hardware.
>
> For gpio-regmap the output data could be in multiple registers, but we
> can use the regmap cache support to shadow the output values by marking
> the data registers as non-volatile. By using regmap_read_bypassed() we
> can still treat the input values as volatile, irrespective of the regmap
> config. This ensures proper functioning of writing the output register
> with regmap_write_bits(), which will then use and update the cache only
> on data writes, gaining some performance from the cached output values.
>
> Signed-off-by: Sander Vanheule <sander@...nheule.net>
That looks good to me for sure!
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
Yours,
Linus Walleij
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