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Message-ID: <4979a32f-f938-4956-8293-eca5667bf1c4@norik.com>
Date: Tue, 21 Oct 2025 12:07:13 +0200
From: Primoz Fiser <primoz.fiser@...ik.com>
To: Marc Kleine-Budde <mkl@...gutronix.de>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
upstream@...ts.phytec.de, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev
Subject: Re: [PATCH 2/2] arm64: dts: freescale: Add phyBOARD-Segin-i.MX91
support
Hi Marc,
On 21. 10. 25 11:50, Marc Kleine-Budde wrote:
> On 21.10.2025 11:37:04, Primoz Fiser wrote:
>> Add initial support for the PHYTEC phyBOARD-Segin-i.MX91 board [1] based
>> on the PHYTEC phyCORE-i.MX91 SoM (System-on-Module) [2].
>>
>> Supported features:
>> * Audio
>> * CAN
>> * eMMC
>> * Ethernet
>> * I2C
>> * RTC
>> * SD-Card
>> * UART
>> * USB
>>
>> For more details see the product pages for the development board and the
>> SoM:
>>
>> [1] https://www.phytec.eu/en/produkte/development-kits/phyboard-segin-kit/
>> [2] https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/
>>
>> Signed-off-by: Primoz Fiser <primoz.fiser@...ik.com>
>> ---
>> arch/arm64/boot/dts/freescale/Makefile | 1 +
>> .../dts/freescale/imx91-phyboard-segin.dts | 344 ++++++++++++++++++
>> .../boot/dts/freescale/imx91-phycore-som.dtsi | 304 ++++++++++++++++
>> 3 files changed, 649 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts
>> create mode 100644 arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
>> index 525ef180481d..34a81d34de39 100644
>> --- a/arch/arm64/boot/dts/freescale/Makefile
>> +++ b/arch/arm64/boot/dts/freescale/Makefile
>> @@ -344,6 +344,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqps-mb-smarc-2.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8ulp-9x9-evk.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx91-11x11-evk.dtb
>> +dtb-$(CONFIG_ARCH_MXC) += imx91-phyboard-segin.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx91-tqma9131-mba91xxca.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts
>> new file mode 100644
>> index 000000000000..bb631439f9cf
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts
>> @@ -0,0 +1,344 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (C) 2025 PHYTEC Messtechnik GmbH
>> + * Author: Christoph Stoidner <c.stoidner@...tec.de>
>> + *
>> + * Product homepage:
>> + * phyBOARD-Segin carrier board is reused for the i.MX91 design.
>> + * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/
>> + */
>> +/dts-v1/;
>> +
>> +#include "imx91-phycore-som.dtsi"
>> +
>> +/{
>> + model = "PHYTEC phyBOARD-Segin-i.MX91";
>> + compatible = "phytec,imx91-phyboard-segin", "phytec,imx91-phycore-som",
>> + "fsl,imx91";
>> +
>> + aliases {
>> + ethernet1 = &eqos;
>> + gpio0 = &gpio1;
>> + gpio1 = &gpio2;
>> + gpio2 = &gpio3;
>> + gpio3 = &gpio4;
>> + i2c0 = &lpi2c1;
>> + i2c1 = &lpi2c2;
>> + mmc0 = &usdhc1;
>> + mmc1 = &usdhc2;
>> + rtc0 = &i2c_rtc;
>> + rtc1 = &bbnsm_rtc;
>> + serial0 = &lpuart1;
>> + };
>> +
>> + chosen {
>> + stdout-path = &lpuart1;
>> + };
>> +
>> + flexcan1_tc: can-phy0 {
>> + compatible = "ti,tcan1043";
>> + #phy-cells = <0>;
>> + max-bitrate = <1000000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_flexcan1_tc>;
>> + enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
>> + };
>
> I think the tcan1043 is a CAN-FD transceiver. According to the datasheet
> it support 2 MBit/s and 5 MBit/s in the "G" variant. However due to the
> board layout, etc, the actual bit rate might still be limited to 1
> MBit/s. Ask the HW engineers if in doubt.
phyBOARD-Segin actually uses a TI SN65HVD234D CAN transceiver chip which
supports up to 1MBps. See [1].
However since there is no direct support for SN65HVD234D we model the
enable signal with the generic PHY driver and use "ti,tcan1043" jsut as
compatible. Suggested by Frank and you in [2].
[1]
https://lore.kernel.org/all/20250415043311.3385835-12-primoz.fiser@norik.com/
[2]
https://lore.kernel.org/all/1571414e-5e7d-4c9e-b69d-11a6fdf454e2@norik.com/
BR,
Primoz
>
> regards,
> Marc
>
--
Primoz Fiser
phone: +386-41-390-545
email: primoz.fiser@...ik.com
--
Norik systems d.o.o.
Your embedded software partner
Slovenia, EU
phone: +386-41-540-545
email: info@...ik.com
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