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Message-Id: <20251021-improve_efficiency_of_clk_divider-v1-1-e2bf7f625af6@amlogic.com> Date: Tue, 21 Oct 2025 18:12:30 +0800 From: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org> To: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org> Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, Chuan Liu <chuan.liu@...ogic.com> Subject: [PATCH 1/2] clk: mux: improve the execution efficiency of determine_rate() From: Chuan Liu <chuan.liu@...ogic.com> According to the current logic of mux_is_better_rate(), even if a parent clock matching req->rate is found again in the current loop, it will not be selected. Exit the loop once the best-matching parent clock is found to avoid unnecessary function calls and reduce execution time. Signed-off-by: Chuan Liu <chuan.liu@...ogic.com> --- drivers/clk/clk.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 85d2f2481acf..925e4768e3ad 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -758,6 +758,9 @@ int clk_mux_determine_rate_flags(struct clk_hw *hw, best_parent = parent; best = parent_rate; } + + if (best == req->rate) + break; } if (!best_parent) -- 2.42.0
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