linux-kernel - [PATCH] arm64: Add kernel parameter to disable trap EL0 accesses to IMPDEF regs

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Message-ID: <20251021115428.557084-1-liaochang1@huawei.com>
Date: Tue, 21 Oct 2025 11:54:28 +0000
From: Liao Chang <liaochang1@...wei.com>
To: <corbet@....net>, <catalin.marinas@....com>, <will@...nel.org>,
	<akpm@...ux-foundation.org>, <paulmck@...nel.org>,
	<pawan.kumar.gupta@...ux.intel.com>, <mingo@...nel.org>, <bp@...en8.de>,
	<kees@...nel.org>, <arnd@...db.de>, <fvdl@...gle.com>, <maz@...nel.org>,
	<broonie@...nel.org>, <oliver.upton@...ux.dev>, <yeoreum.yun@....com>,
	<yangyicong@...ilicon.com>, <james.morse@....com>, <ardb@...nel.org>,
	<hardevsinh.palaniya@...iconsignals.io>
CC: <linux-doc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH] arm64: Add kernel parameter to disable trap EL0 accesses to IMPDEF regs

Add kernel parameter to allow system-wide EL0 access to IMPDEF system
regregisters and instructions without trapping to EL1/EL2. Since trap
overhead will compromises benefits, and it's even worse in
virtualization on CPU where certain IMPDEF registers and instructions
are designed for EL0 performance use.

More early discussion could be found from link below.

Link: https://lore.kernel.org/all/24afb8de-622a-4865-bd8e-8e89ccfff8f4@huawei.com/
Tested-by: Xinyu Zheng <zhengxinyu6@...wei.com>
Signed-off-by: Liao Chang <liaochang1@...wei.com>
---
 Documentation/admin-guide/kernel-parameters.txt |  9 +++++++++
 arch/arm64/kernel/cpufeature.c                  | 14 +++++++++++++-
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 5a7a83c411e9..11ffa9f7b972 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -326,6 +326,15 @@
 			See Documentation/arch/arm64/asymmetric-32bit.rst for more
 			information.
 
+	no_trap_el0_impdef [Arm64,EARLY]
+			Allow system-wide EL0 access to IMPDEF system registers
+			and instructions without trapping to EL1/EL2.
+			Since trap overhead compromises benefits, and it's even
+			worse in virtualization on CPU where certain IMPDEF
+			registers and instructions are designed for EL0
+			performance use. This assumes the kernel adds the
+			support for Armv8.8 extension FEAT_TIDCP1.
+
 	amd_iommu=	[HW,X86-64]
 			Pass parameters to the AMD IOMMU driver in the system.
 			Possible values are:
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index ef269a5a37e1..d12e35d799ee 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2459,9 +2459,21 @@ static bool is_kvm_protected_mode(const struct arm64_cpu_capabilities *entry, in
 }
 #endif /* CONFIG_KVM */
 
+static bool no_trap_el0_impdef;
+
+static int __init parse_no_trap_el0_impdef(char *p)
+{
+	no_trap_el0_impdef = true;
+	return 0;
+}
+early_param("no_trap_el0_impdef", parse_no_trap_el0_impdef);
+
 static void cpu_trap_el0_impdef(const struct arm64_cpu_capabilities *__unused)
 {
-	sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_TIDCP);
+	if (no_trap_el0_impdef)
+		sysreg_clear_set(sctlr_el1, SCTLR_EL1_TIDCP, 0);
+	else
+		sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_TIDCP);
 }
 
 static void cpu_enable_dit(const struct arm64_cpu_capabilities *__unused)
-- 
2.34.1