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Message-ID: <5d8e439a-9ad0-4d2e-b106-d6e65a3e4638@amlogic.com>
Date: Wed, 22 Oct 2025 10:09:53 +0800
From: Xianwei Zhao <xianwei.zhao@...ogic.com>
To: Neil Armstrong <neil.armstrong@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc: linux-amlogic@...ts.infradead.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 2/2] dts: arm64: amlogic: add a5 pinctrl node
Hi Neil,
Thanks for your reply.
On 2025/10/21 20:23, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
>
> On 9/5/25 05:19, Xianwei Zhao wrote:
>> Hi Neil,
>> Could you please take some time to review this submission?
>
> Could you rebase on v6.18-rc1 ?
>
Will do.
> Thanks,
> Neil
>
>>
>> On 2025/4/3 16:33, Xianwei Zhao via B4 Relay wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> From: Xianwei Zhao <xianwei.zhao@...ogic.com>
>>>
>>> Add pinctrl device to support Amlogic A5.
>>>
>>> Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
>>> ---
>>> arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 90
>>> +++++++++++++++++++++++++++++
>>> 1 file changed, 90 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>>> b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>>> index 32ed1776891b..844302db2133 100644
>>> --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>>> @@ -4,6 +4,7 @@
>>> */
>>>
>>> #include "amlogic-a4-common.dtsi"
>>> +#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
>>> #include <dt-bindings/power/amlogic,a5-pwrc.h>
>>> / {
>>> cpus {
>>> @@ -50,6 +51,95 @@ pwrc: power-controller {
>>> };
>>>
>>> &apb {
>>> + periphs_pinctrl: pinctrl@...0 {
>>> + compatible = "amlogic,pinctrl-a5",
>>> + "amlogic,pinctrl-a4";
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges = <0x0 0x0 0x0 0x4000 0x0 0x300>;
>>> +
>>> + gpioz: gpio@c0 {
>>> + reg = <0x0 0xc0 0x0 0x40>,
>>> + <0x0 0x18 0x0 0x8>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_Z<<8) 16>;
>>> + };
>>> +
>>> + gpiox: gpio@100 {
>>> + reg = <0x0 0x100 0x0 0x40>,
>>> + <0x0 0xc 0x0 0xc>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_X<<8) 20>;
>>> + };
>>> +
>>> + gpiot: gpio@140 {
>>> + reg = <0x0 0x140 0x0 0x40>,
>>> + <0x0 0x2c 0x0 0x8>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_T<<8) 14>;
>>> + };
>>> +
>>> + gpiod: gpio@180 {
>>> + reg = <0x0 0x180 0x0 0x40>,
>>> + <0x0 0x40 0x0 0x8>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_D<<8) 16>;
>>> + };
>>> +
>>> + gpioe: gpio@1c0 {
>>> + reg = <0x0 0x1c0 0x0 0x40>,
>>> + <0x0 0x48 0x0 0x4>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_E<<8) 2>;
>>> + };
>>> +
>>> + gpioc: gpio@200 {
>>> + reg = <0x0 0x200 0x0 0x40>,
>>> + <0x0 0x24 0x0 0x8>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_C<<8) 11>;
>>> + };
>>> +
>>> + gpiob: gpio@240 {
>>> + reg = <0x0 0x240 0x0 0x40>,
>>> + <0x0 0x0 0x0 0x8>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_B<<8) 14>;
>>> + };
>>> +
>>> + gpioh: gpio@280 {
>>> + reg = <0x0 0x280 0x0 0x40>,
>>> + <0x0 0x4c 0x0 0x4>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_H<<8) 5>;
>>> + };
>>> +
>>> + gpio_test_n: gpio@2c0 {
>>> + reg = <0x0 0x2c0 0x0 0x40>,
>>> + <0x0 0x3c 0x0 0x4>;
>>> + reg-names = "gpio", "mux";
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + gpio-ranges = <&periphs_pinctrl 0
>>> (AMLOGIC_GPIO_TEST_N<<8) 1>;
>>> + };
>>> + };
>>> +
>>> gpio_intc: interrupt-controller@...0 {
>>> compatible = "amlogic,a5-gpio-intc",
>>> "amlogic,meson-gpio-intc";
>>>
>>> --
>>> 2.37.1
>>>
>>>
>
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