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Message-ID: <20251022140841.GB11174@nxa18884-linux.ap.freescale.net>
Date: Wed, 22 Oct 2025 22:08:41 +0800
From: Peng Fan <peng.fan@....nxp.com>
To: Laurentiu Mihalcea <laurentiumihalcea111@...il.com>
Cc: Abel Vesa <abelvesa@...nel.org>, Peng Fan <peng.fan@....com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Fabio Estevam <festevam@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Daniel Baluta <daniel.baluta@....com>,
Shengjiu Wang <shengjiu.wang@....com>, linux-clk@...r.kernel.org,
imx@...ts.linux.dev, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH v2 2/8] dt-bindings: clock: document 8ULP's SIM LPAV
Hi Laurentiu,
On Fri, Oct 17, 2025 at 04:20:19AM -0700, Laurentiu Mihalcea wrote:
>From: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
>
>Add documentation for i.MX8ULP's SIM LPAV module.
>
>Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
>---
>+description:
>+ The i.MX8ULP LPAV subsystem contains a block control module known as
>+ SIM LPAV, which offers functionalities such as clock gating or reset
>+ line assertion/de-assertion.
>+
>+properties:
>+ compatible:
>+ const: fsl,imx8ulp-sim-lpav
This block also contains QoS registers, General purpose registers, HIFI
general purpose registers, and others.
I am not sure whether need to add a syscon fallback here. dt maintainer may
help comment.
Regards,
Peng
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