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Message-ID: <b202b140-b669-4260-891d-aa451521664a@gmail.com>
Date: Wed, 22 Oct 2025 23:25:39 +0100
From: Usama Arif <usamaarif642@...il.com>
To: dwmw@...zon.co.uk, tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...ux.intel.com, ardb@...nel.org, hpa@...or.com
Cc: x86@...nel.org, apopple@...dia.com, thuth@...hat.com,
nik.borisov@...e.com, kas@...nel.org, linux-kernel@...r.kernel.org,
linux-efi@...r.kernel.org, kernel-team@...a.com,
Michael van der Westhuizen <rmikey@...a.com>, Tobias Fleig <tfleig@...a.com>
Subject: Re: [PATCH 0/3] x86: Fix kexec 5-level to 4-level paging transition
On 22/10/2025 23:06, Usama Arif wrote:
> This series addresses critical bugs in the kexec path when transitioning
> from a kernel using 5-level page tables to one using 4-level page tables.
>
> The root cause is improper handling of PGD entry value during the page level
> transition. Specifically p4d value is masked with PAGE_MASK instead of
> PTE_PFN_MASK, failing to account for high-order software bits like
> _PAGE_BIT_NOPTISHADOW (bit 58).
s/p4d value/PGD entry value/ for consistency.
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