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Message-ID: <da62c4ed-ce15-45cc-94f6-3689b8f46d14@linux.intel.com>
Date: Wed, 22 Oct 2025 13:32:38 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo
<acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Andi Kleen <ak@...ux.intel.com>, Eranian Stephane <eranian@...gle.com>,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
Dapeng Mi <dapeng1.mi@...el.com>, Kan Liang <kan.liang@...ux.intel.com>
Subject: Re: [Patch v8 06/12] perf/x86/intel/ds: Factor out PEBS record
processing code to functions
On 10/21/2025 11:49 PM, Peter Zijlstra wrote:
> On Wed, Oct 15, 2025 at 02:44:16PM +0800, Dapeng Mi wrote:
>
>> +static inline void __intel_pmu_handle_pebs_record(struct pt_regs *iregs,
>> + struct pt_regs *regs,
>> + struct perf_sample_data *data,
>> + void *at, u64 pebs_status,
>> + struct perf_event *events[],
>> + short *counts, void **last,
>> + setup_fn setup_sample)
>> +{
>> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>> + struct perf_event *event;
>> + int bit;
>> +
>> + for_each_set_bit(bit, (unsigned long *)&pebs_status, X86_PMC_IDX_MAX) {
>> + event = cpuc->events[bit];
>> +
>> + if (WARN_ON_ONCE(!event) ||
>> + WARN_ON_ONCE(!event->attr.precise_ip))
>> + continue;
>> +
>> + if (counts[bit]++)
>> + __intel_pmu_pebs_event(event, iregs, regs, data,
>> + last[bit], setup_sample);
> No brackets, while coding style requires.
Sure. Not sure why checkpatch.pl doesn't found it. Thanks.
>
>> +
>> + last[bit] = at;
>> + /*
>> + * perf_event_overflow() called by below __intel_pmu_pebs_last_event()
>> + * could trigger interrupt throttle and clear all event pointers of
>> + * the group in cpuc->events[] to NULL. So snapshot the event[] before
>> + * it could be cleared. This avoids the possible NULL event pointer
>> + * access and PEBS record loss.
>> + */
>> + if (counts[bit] && !events[bit])
>> + events[bit] = cpuc->events[bit];
>> + }
>> +}
>
>> @@ -2671,41 +2728,15 @@ static void intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_d
>> if (basic->format_size != cpuc->pebs_record_size)
>> continue;
>>
>> - pebs_status = basic->applicable_counters & cpuc->pebs_enabled & mask;
>> - for_each_set_bit(bit, (unsigned long *)&pebs_status, X86_PMC_IDX_MAX) {
>> - event = cpuc->events[bit];
>> -
>> - if (WARN_ON_ONCE(!event) ||
>> - WARN_ON_ONCE(!event->attr.precise_ip))
>> - continue;
>> -
>> - if (counts[bit]++) {
>> - __intel_pmu_pebs_event(event, iregs, regs, data, last[bit],
>> - setup_pebs_adaptive_sample_data);
>> - }
> Brackets. Which suggests you took effort to remove them, since cut-paste
> code movement would've preserved them.
>
> I've re-instated them.
>
>> - last[bit] = at;
>> -
>> - /*
>> - * perf_event_overflow() called by below __intel_pmu_pebs_last_event()
>> - * could trigger interrupt throttle and clear all event pointers of
>> - * the group in cpuc->events[] to NULL. So snapshot the event[] before
>> - * it could be cleared. This avoids the possible NULL event pointer
>> - * access and PEBS record loss.
>> - */
>> - if (counts[bit] && !events[bit])
>> - events[bit] = cpuc->events[bit];
>> - }
>> + pebs_status = mask & basic->applicable_counters;
>> + __intel_pmu_handle_pebs_record(iregs, regs, data, at,
>> + pebs_status, events, counts, last,
>> + setup_pebs_adaptive_sample_data);
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