linux-kernel - Re: [PATCH v4 2/9] dt-bindings: media: nxp: Add Wave6 video codec device

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Message-ID: <8b420cd2-9549-4033-b82f-a2bc145b7280@kernel.org>
Date: Wed, 22 Oct 2025 10:31:11 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Nas Chung <nas.chung@...psnmedia.com>, mchehab@...nel.org,
 hverkuil@...all.nl, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de
Cc: linux-media@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-imx@....com,
 linux-arm-kernel@...ts.infradead.org, jackson.lee@...psnmedia.com,
 lafley.kim@...psnmedia.com, marek.vasut@...lbox.org
Subject: Re: [PATCH v4 2/9] dt-bindings: media: nxp: Add Wave6 video codec
 device

On 22/10/2025 09:47, Nas Chung wrote:
> Add documentation for the Chips&Media Wave6 video codec on
> NXP i.MX SoCs.
> 
> The Wave6 video codec functionality is split between a VPU
> control region and VPU core regions.
> The VPU control region is represented as the parent node and
> manages shared resources such as firmware memory. Each VPU
> core region is represented as a child node and provides the
> actual encoding and decoding capabilities.
> 
> Both the control and core regions may be assigned IOMMU
> stream IDs for DMA isolation.


Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

> 


> +
> +  ranges: true
> +
> +patternProperties:
> +  "^video-core@[0-9a-f]+$":
> +    type: object
> +    description:
> +      A VPU core region within the Chips&Media Wave6 codec IP.
> +      Each core provides encoding and decoding capabilities and operates
> +      under the control of the VPU control region.


You explained more in previous email than in this description. Are these
independent? Can they be independently used?

But you also said there is one processing engine, so I do not understand
why these are separate. If you have one engine, there is no such thing
as separate cores.

Best regards,
Krzysztof