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Message-ID: <5j7dxbp6biaweup6k2gizbx2g5cf5kzf34jx7mhukrcto7mkz6@3azkzkr7bioc>
Date: Wed, 22 Oct 2025 12:07:47 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Luca Weiss <luca.weiss@...rphone.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Danila Tikhonov <danila@...xyga.com>,
Taniya Das <taniya.das@....qualcomm.com>, ~postmarketos/upstreaming@...ts.sr.ht,
phone-devel@...r.kernel.org, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] clk: qcom: camcc-sm6350: Fix PLL config of PLL2
On 25-10-21 20:08:54, Luca Weiss wrote:
> The 'Agera' PLLs (with clk_agera_pll_configure) do not take some of the
> parameters that are provided in the vendor driver. Instead the upstream
> configuration should provide the final user_ctl value that is written to
> the USER_CTL register.
>
> Fix the config so that the PLL is configured correctly, and fixes
> CAMCC_MCLK* being stuck off.
>
> Fixes: 80f5451d9a7c ("clk: qcom: Add camera clock controller driver for SM6350")
> Suggested-by: Taniya Das <taniya.das@....qualcomm.com>
> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
Reviewed-by: Abel Vesa <abel.vesa@...aro.org>
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