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Message-ID: <1j8qh34098.fsf@starbuckisacylon.baylibre.com>
Date: Wed, 22 Oct 2025 13:57:39 +0200
From: Jerome Brunet <jbrunet@...libre.com>
To: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org>
Cc: Neil Armstrong <neil.armstrong@...aro.org>, Michael Turquette
<mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Kevin Hilman
<khilman@...libre.com>, Martin Blumenstingl
<martin.blumenstingl@...glemail.com>, chuan.liu@...ogic.com,
linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] clk: amlogic: Fix out-of-range PLL frequency setting
On Wed 22 Oct 2025 at 14:58, Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org> wrote:
> From: Chuan Liu <chuan.liu@...ogic.com>
>
> meson_clk_get_pll_range_index incorrectly determines the maximum value
> of 'm'.
This explanation is little light !
How did the problem show up ? Under which condition ? How did you come
this conclusion ?
Other people having problems might benefit from the explanation
>
> Fixes: 8eed1db1adec6 ("clk: meson: pll: update driver for the g12a")
> Signed-off-by: Chuan Liu <chuan.liu@...ogic.com>
> ---
> drivers/clk/meson/clk-pll.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
> index 1ea6579a760f..b07e1eb19d12 100644
> --- a/drivers/clk/meson/clk-pll.c
> +++ b/drivers/clk/meson/clk-pll.c
> @@ -191,7 +191,7 @@ static int meson_clk_get_pll_range_index(unsigned long rate,
> *m = meson_clk_get_pll_range_m(rate, parent_rate, *n, pll);
>
> /* the pre-divider gives a multiplier too big - stop */
> - if (*m >= (1 << pll->m.width))
> + if (*m > pll->range->max)
Making sure m does not exceed the maximum value is valid too.
You should check both conditions then
> return -EINVAL;
>
> return 0;
--
Jerome
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