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Message-Id: <20251023-mt8196-ufs-v3-9-0f04b4a795ff@collabora.com>
Date: Thu, 23 Oct 2025 21:49:27 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Alim Akhtar <alim.akhtar@...sung.com>,
Avri Altman <avri.altman@....com>, Bart Van Assche <bvanassche@....org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Peter Wang <peter.wang@...iatek.com>, Stanley Jhu <chu.stanley@...il.com>,
"James E.J. Bottomley" <James.Bottomley@...senPartnership.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: Louis-Alexis Eyraud <louisalexis.eyraud@...labora.com>,
kernel@...labora.com, linux-scsi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
linux-phy@...ts.infradead.org,
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: [PATCH v3 09/24] scsi: ufs: mediatek: Rework the crypt-boost stuff
I don't know whether the crypt-boost functionality as it is currently
implemented is even appropriate for mainline. It might be better done in
some generic way. But what I do know is that I can rework the code to
make it less obtuse.
Prefix the boost stuff with the appropriate vendor prefix, remove the
pointless clock wrappers, and rework the function.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
---
drivers/ufs/host/ufs-mediatek.c | 91 +++++++++++++++--------------------------
1 file changed, 32 insertions(+), 59 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 131f71145a12..9c0ac72d6e43 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -562,21 +562,6 @@ static int ufs_mtk_mphy_power_on(struct ufs_hba *hba, bool on)
return 0;
}
-static int ufs_mtk_get_host_clk(struct device *dev, const char *name,
- struct clk **clk_out)
-{
- struct clk *clk;
- int err = 0;
-
- clk = devm_clk_get(dev, name);
- if (IS_ERR(clk))
- err = PTR_ERR(clk);
- else
- *clk_out = clk;
-
- return err;
-}
-
static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -633,65 +618,53 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost)
clk_disable_unprepare(cfg->clk_crypt_mux);
}
-static int ufs_mtk_init_host_clk(struct ufs_hba *hba, const char *name,
- struct clk **clk)
-{
- int ret;
-
- ret = ufs_mtk_get_host_clk(hba->dev, name, clk);
- if (ret) {
- dev_info(hba->dev, "%s: failed to get %s: %d", __func__,
- name, ret);
- }
-
- return ret;
-}
-
-static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
+static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct ufs_mtk_crypt_cfg *cfg;
struct device *dev = hba->dev;
- struct regulator *reg;
- u32 volt;
+ int ret;
- host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)),
- GFP_KERNEL);
- if (!host->crypt)
- goto disable_caps;
+ cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
+ if (!cfg)
+ return -ENOMEM;
- reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
- if (IS_ERR(reg)) {
- dev_info(dev, "failed to get dvfsrc-vcore: %ld",
- PTR_ERR(reg));
- goto disable_caps;
+ cfg->reg_vcore = devm_regulator_get_optional(dev, "dvfsrc-vcore");
+ if (IS_ERR(cfg->reg_vcore)) {
+ dev_err(dev, "Failed to get dvfsrc-vcore: %pe", cfg->reg_vcore);
+ return PTR_ERR(cfg->reg_vcore);
}
- if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min",
- &volt)) {
- dev_info(dev, "failed to get boost-crypt-vcore-min");
- goto disable_caps;
+ ret = of_property_read_u32(dev->of_node, "mediatek,boost-crypt-vcore-min",
+ &cfg->vcore_volt);
+ if (ret) {
+ dev_err(dev, "Failed to get mediatek,boost-crypt-vcore-min: %pe\n",
+ ERR_PTR(ret));
+ return ret;
}
- cfg = host->crypt;
- if (ufs_mtk_init_host_clk(hba, "crypt_mux",
- &cfg->clk_crypt_mux))
- goto disable_caps;
+ cfg->clk_crypt_mux = devm_clk_get(dev, "crypt_mux");
+ if (IS_ERR(cfg->clk_crypt_mux)) {
+ dev_err(dev, "Failed to get clock crypt_mux: %pe\n", cfg->clk_crypt_mux);
+ return PTR_ERR(cfg->clk_crypt_mux);
+ }
- if (ufs_mtk_init_host_clk(hba, "crypt_lp",
- &cfg->clk_crypt_lp))
- goto disable_caps;
+ cfg->clk_crypt_lp = devm_clk_get(dev, "crypt_lp");
+ if (IS_ERR(cfg->clk_crypt_lp)) {
+ dev_err(dev, "Failed to get clock crypt_lp: %pe\n", cfg->clk_crypt_lp);
+ return PTR_ERR(cfg->clk_crypt_lp);
+ }
- if (ufs_mtk_init_host_clk(hba, "crypt_perf",
- &cfg->clk_crypt_perf))
- goto disable_caps;
+ cfg->clk_crypt_perf = devm_clk_get(dev, "crypt_perf");
+ if (IS_ERR(cfg->clk_crypt_perf)) {
+ dev_err(dev, "Failed to get clock crypt_perf: %pe\n", cfg->clk_crypt_perf);
+ return PTR_ERR(cfg->clk_crypt_perf);
+ }
- cfg->reg_vcore = reg;
- cfg->vcore_volt = volt;
+ host->crypt = cfg;
host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE;
-disable_caps:
- return;
+ return 0;
}
static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
--
2.51.1.dirty
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